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PDF FDMA7672 Data sheet ( Hoja de datos )
| Número de pieza | FDMA7672 | |
| Descripción | Single N-Channel PowerTrench MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FDMA7672
Single N-Channel PowerTrench® MOSFET
April 2012
30 V, 9 A, 21 mΩ
Features
General Description
Max rDS(on) = 21 mΩ at VGS = 10 V, ID = 9 A
Max rDS(on) = 32 mΩ at VGS = 4.5 V, ID = 7 A
Low Profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
Free from halogenated compounds and antimony oxides
RoHS compliant
This device has been designed to provide maximum efficiency
and thermal performance for synchronous buck converters. The
low rDS(on) and gate charge provide excellent switching
performance.
Application
DC – DC Buck Converters
Pin 1
Drain
DD G
Source
Bottom Drain Contact
DD
DD
DD S
MicroFET 2X2 (Bottom View)
G
S
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
TA = 25 °C
Power Dissipation
TA = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
30
±20
9
24
2.4
0.9
–55 to +150
Units
V
V
A
W
°C
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
6.9
52
145
°C/W
Device Marking
672
Device
FDMA7672
Package
MicroFET 2x2
Reel Size
7 ’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5
1
www.fairchildsemi.com
1 page  
Dimensional Outline and Pad Layout
0.10 C
2X
2.000
2.000
PIN#1 LOCATION
0.8 MAX
0.10 C
0.08 C 0.05
0.00
SEATING
PLANE
PIN #1 IDENT
0.33
0.20
0.10 C
2X
(0.20)
C
(0.30)
1.000
0.800
1
3
(0.56) 1.05
0.95
6
0.65
1.30
4
0.25~0.35
0.10 C A B
0.05 C
1.00
6
4
NO DRAIN OR GATE
TRACES ALLOWED IN
THIS AREA
1.05
1.35
0.66
2.30
(0.47)
1
0.65 TYP
3
0.40 TYP
RECOMMENDED LAND PATTERN OPT 1
1.00
6
4
1.05
1.35
0.66 2.30
(0.47)
1
3
0.65 TYP
0.40 TYP
RECOMMENDED LAND PATTERN OPT 2
A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION
MO-229 DATED AUG/2003
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
D. DRAWING FILENAME: MKT-MLP06Lrev2.
©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet FDMA7672.PDF ] | |
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