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PDF G080Y1-T01 Datasheet ( Hoja de datos )

Número de pieza G080Y1-T01
Descripción TFT LCD Module
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G080Y1-T01 datasheet

1 Page

G080Y1-T01 pdf
Issued Date: Jan. 09, 2009
Model No.: G080Y1-T01
Tentative
1.5 MECHANICAL SPECIFICATIONS
Item
Horizontal(H)
Module Size Vertical(V)
Depth(D)
Min.
(189.7)
(119.7)
(4.76)
Typ.
(190)
(120)
(5.06)
Max.
(190.3)
(120.3)
(5.36)
Unit Note
mm
mm
(1)
mm
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
5 / 24
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G080Y1-T01 arduino
Issued Date: Jan. 09, 2009
Model No.: G080Y1-T01
Tentative
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 FPC I/O PIN ASSIGNMENT
Pin
Name
I/O
Description
1
GND
I Power Ground
2
VGL
I Gate OFF Power Supply Voltage
3
VGL
I Gate OFF Power Supply Voltage
4
/XAO
I
Output all-on control
When /XAO is set to L, all outputs are fixed to VGH
5
VDDG
I Gate Driver Power supply (+3.3V)
6
VDDG
I Gate Driver Power supply (+3.3V)
7
GND
I Power Ground
8
VGH
I Gate ON Power Supply Voltage
Gate Driver Up/down scan setting
9 UD I When UD=H, reverse scan
When UD=L, normal scan (Default pull low)
10
DE
I
Input data enable control
When DE mode, active High to enable data input. (Default pull low)
Dithering control setting
11
FRC
I
When FRC=H, the width of data input 8 bits
When FRC=L, the width of data input 6 bits and set Dx0 and Dx1 to logical low
(Default pull low)
12 B07 I Blue data (MSB)
13 B06 I Blue data
14 B05 I Blue data
15 B04 I Blue data
16 B03 I Blue data
17 B02 I Blue data
18 B01 I Blue data
19 B00 I Blue data (LSB)
20
CLK
I
Clock signal
User can input different polarity CLK by EDGSL setting. (Default pull low)
21 GND I Power Ground
22 G07 I Green data (MSB)
23 G06 I Green data
24 G05 I Green data
25 G04 I Green data
26 G03 I Green data
27 G02 I Green data
28 G01 I Green data
29 G00 I Green data (LSB)
30 R07 I Red data (MSB)
31 R06 I Red data
32 R05 I Red data
33 R04 I Red data
34 R03 I Red data
35 R02 I Red data
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