DataSheet.es T-51750GD065J-FW-ADN Hoja de datos PDF



PDF T-51750GD065J-FW-ADN Datasheet ( Hoja de datos )

Número de pieza T-51750GD065J-FW-ADN
Descripción LCD Module
Fabricantes OPTREX 
Logotipo OPTREX Logotipo
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T-51750GD065J-FW-ADN datasheet

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T-51750GD065J-FW-ADN pdf
2.3. AC Characteristic
ITEM
SYMBOL MIN. TYP. MAX.
UNIT
Frequency
fCLK
20 25 30
MHz
DCLK
Period
Low Width
tCLK
33.3
40
50
tWCL
10 --
--
ns
ns
High Width
tWCH
10 --
--
ns
DATA
(R,G,B,DENA,
HD, VD)
Set up time
Hold time
tDS
5 -- --
ns
tDH
5 -- --
ns
Horizontal Active Time
tHA
640 640 640
tCLK
Horizontal Front Porch
tHFP
0 -- --
tCLK
DENA
Horizontal Back Porch
Vertical Active Time
tHBP
tVA
7 -- --
480 480 480
tCLK
tH
Vertical Front Porch tVFP 1 20 -- tH
Vertical Back Porch tVBP 8 20 -- tH
Frequency
fH
27 31.5 38
kHz
HD Period
tH 26.3 31.7 37.0
s
Low Width
tWHL
5 -- --
tCLK
Frequency
fV
55 60 70
Hz
VD Period
tV
14.3 16.7 18.2
ms
Low Width
tWVL 3 -- -- tH
[Note]
1) DATA is latched at fall edge of DCLK in this timing specification.
2) Polarities of HD and VD are negative in this specification.
3) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
4) DCLK should appear during all invalid period, and HD should appear during invalid period of frame cycle.
5) Accepted only 640 data and 480 lines.
6) REV should be stable during operation.
T-51750GD065J-FW-ADN (AD) No. 2005-0498
OPTREX CORPORATION
Page 5/24

5 Page

T-51750GD065J-FW-ADN arduino
1.1.Lighting Specifications
Ta=25°C
Parameter
Symbol Conditions
Min.
Typ.
Max.
Units Notes
Lamp Voltage VL -
- 320 - Vrms 1
Lamp Current IL -
- 6.0 7.0 mArms 2
Starting Voltage
Surface Luminance
VS
L
-
IL=6mA
- - 520 Vrms 3
- 4500 - cd/m2 4
Average Life
TAL IL=6mA 50,000
-
- hrs 5
Note 1 :The voltage ( r.m.s. ) to maintain the electric discharge of the lamp. It is measured after
lighting for 3 minutes .
Note 2 :The current ( r.m.s. ) to flow through the lamp with the electric discharge. It is measured
after lighting for 3 minutes.
Note 3 :The voltage at starting the electric discharge when the voltage is increased gradually
from 0V.
Note 4 :Surface Luminance is specified by the average of 9 luminance values measured at each
point shown above after 20 minutes power on with the all ON pattern adjusted to maximum
contrast and the dimming control of 100%. ( maximum brightness )
Note 5 : CFL Life is defined as time period that the actual luminance becomes 50% or lower of its
initial value.
The Average life time of CFL is defined as the time when half or more of the testing CFLs
have become less bright than 50% of the initial brightness at continuous operation.
I
N VS
V
C
VL F
L
Y=60 Y=320 Y=580
P1 P2 P3
P4 P5 P6
P7 P8 P9
X=60
X=240
X=420
IL
CFL Testing Circuit
Measurement Points
Recommended Inverter : S-12645 ( Produced by ELEVAM )
T-51750GD065J-FW-ADN (AD) No. 2005-0498
OPTREX CORPORATION
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