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Número de pieza TISP5095H3BJ
Descripción FORWARD-CONDUCTING UNIDIRECTIONAL THYRISTOR
Fabricantes Bourns 
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TISP5070H3BJ THRU TISP5190H3BJ
FORWARD-CONDUCTING UNIDIRECTIONAL THYRISTOR
OVERVOLTAGE PROTECTORS
TISP5xxxH3BJ Overvoltage Protector Series
Analogue Line Card and ISDN Protection
- Analogue SLIC
- ISDN U Interface
- ISDN Power Supply
8 kV 10/700, 200 A 5/310 ITU-T K.20/21/45 rating
Ion-Implanted Breakdown Region
- Precise and Stable Voltage
Low Voltage Overshoot under Surge
Device Name
TISP5070H3BJ
TISP5080H3BJ
TISP5095H3BJ
TISP5110H3BJ
TISP5115H3BJ
TISP5150H3BJ
TISP5190H3BJ
VDRM
V
-58
-65
-75
-80
-90
-120
-160
V(BO)
V
-70
-80
-95
-110
-115
-150
-190
Rated for International Surge Wave Shapes
Wave Shape
Standard
2/10
8/20
10/160
10/700
10/560
10/1000
GR-1089-CORE
ANSI C62.41
TIA-968-A
ITU-T K.20/21/45
TIA-968-A
GR-1089-CORE
IPPSM
A
500
300
250
200
160
100
SMB Package (Top View)
A1
Device Symbol
2K
MD5UFCAB
K
SD5XAD
A
.............................................. UL Recognized Component
Description
These devices are designed to limit overvoltages on the telephone and data lines. Overvoltages are normally caused by a.c. power system or
lightning flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is
typically used for the protection of ISDN power supply feeds. Two devices, one for the Ring output and the other for the Tip output, will provide
protection for single supply analogue SLICs. A combination of three devices will give a low capacitance protector network for the 3-point
protection of ISDN lines.
The protector consists of a voltage-triggered unidirectional thyristor with an anti-parallel diode. Negative overvoltages are initially clipped by
breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-
voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current
prevents d.c. latchup as the diverted current subsides. Positive overvoltages are limited by the conduction of the anti-parallel diode.
How to Order
Device
Package
Carrier
For Standard
For Lead Free
Termination Finish Termination Finish
Order As
Order As
BJ (J-Bend Embossed
TISP5xxxH3BJ DO-214AA/SMB) Tape Reeled TISP5xxxH3BJR
TISP5xxxH3BJR-S
Insert xxx value corresponding to protection voltages of 070, 080, 110, 115 and 150.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
JANUARY 1998 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Marking
Code
5xxxH3
Std.
Quantity
3000

1 page




TISP5095H3BJ pdf
TISP5xxxH3BJ Overvoltage Protection Series
Typical Characteristics
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
100
TC5XAFA
1.10
NORMALIZED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
TC5XAIA
10
1.05
1
0·1
VD = -50 V
0·01
0·001
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 2.
150
ON-STATE AND FORWARD CURRENTS
vs
ON-STATE AND FORWARD VOLTAGES
200
150 TA = 25 °C
100 tW = 100 µs
70
50
40
30
20
15
10
7
5 VF
4
3
VT
2
1.5
1
0.7 1
1.5 2
3 4 5 7 10
TC5LAC VT , VF- On-State Voltage, Forward Voltage - V
Figure 4.
JANUARY 1998 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
1.00
0.95
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 3.
150
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC5XAD
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 5.
150

5 Page





TISP5095H3BJ arduino
TISP5xxxH3BJ Overvoltage Protection Series
APPLICATIONS INFORMATION
AC Power Testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that exceed these times must be
terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature Coefficient) resistors and fusible resistors are overcurrent
protection devices which can be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere.
In some cases it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. The current versus
time characteristic of the overcurrent protector must be below the line shown in Figure 8. In some cases there may be a further time limit
imposed by the test standard (e.g. UL 1459 wiring simulator failure).
Capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of -1 V, -2 V and -50 V. The TISP5150H3BJ
and TISP5190H3BJ are also given for a bias of -100 V. Values for other voltages may be determined from Figure 6. Up to 10 MHz, the
capacitance is essentially independent of frequency. Above 10 MHz, the effective capacitance is strongly dependent on connection inductance.
In Figure 12, the typical conductor bias voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance
caused by biasing one protector at -2 V and the other at -50 V. For example, the TISP5070H3BJ has a differential capacitance value of 166 pF
under these conditions.
Normal System Voltage Levels
The protector should not clip or limit the voltages that occur in normal system operation. Figure 9 allows the calculation of the protector VDRM
value at temperatures below 25 °C. The calculated value should not be less than the maximum normal system voltages. The TISP5150H3BJ,
with a VDRM of -120 V, can be used to protect ISDN feed voltages having maximum values of -99 V, -110 V and -115 V (range 3 through to
range 5). These three range voltages represent 0.83 (99/120), 0.92 (110/120) and 0.96 (115/120) of the -120 V TISP5150H3BJ VDRM. Figure 9
shows that the VDRM will have decreased to 0.944 of its 25 °C value at -40 °C. Thus, the supply feed voltages of -99 V (0.83) and -110 V (0.92)
will not be clipped at temperatures down to -40 °C. The -115 V (0.96) feed supply may be clipped if the ambient temperature falls below -21 °C.
JESD51 Thermal Measurement Method
To standardize thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51 standard. Part 2 of the standard
(JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3 ) cube which contains the test PCB (Printed Circuit Board)
horizontally mounted at the center. Part 3 of the standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for
packages smaller than 27 mm on a side and the other for packages up to 48 mm. The SMB (DO-214AA) measurements used the smaller 76.2
mm x 114.3 mm (3.0 ” x 4.5 ”) PCB. The JESD51-3 PCBs are designed to have low effective thermal conductivity (high thermal resistance) and
represent a worse case condition. The PCBs used in the majority of applications will achieve lower values of thermal resistance and so can
dissipate higher power levels than indicated by the JESD51 values.
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
JANUARY 1998 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.

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