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PDF F8NK85Z Data sheet ( Hoja de datos )
| Número de pieza | F8NK85Z | |
| Descripción | STF8NK85Z | |
| Fabricantes | STMicroelectronics | |
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STP8NK85Z
STF8NK85Z
N-channel 850V - 1.1Ω - 6.7A - TO-220 /TO-220FP
Zener - protected SuperMESH™ Power MOSFET
General features
Type
STP8NK85Z
STF8NK85Z
VDSS
(@Tjmax)
850 V
850 V
RDS(on)
< 1.4 Ω
< 1.4 Ω
ID
6.7 A
6.7 A
■ Extremely high dv/dt capability
■ 100% avalange tested
)■ Gate charge minimized
t(s■ Very low intrinsic capacitances
uc■ Very good manufacturing repeatibility
rodDescription
te PThe SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
lestrip-based PowerMESH™ layout. In addition to
sopushing on-resistance significantly down, special
bcare is taken to ensure a very good dv/dt
Ocapability for the most demanding applications.
-Such series complements ST full range of high
)voltage MOSFETs including revolutionary
t(sMDmesh™ products.
ucApplications
rod■ Switching application
TO-220
3
2
1
TO-220FP
Internal schematic diagram
solete POrder codes
Ob Part number
Marking
Package
Packaging
STP8NK85Z
P8NK85Z
TO-220
Tube
STF8NK85Z
F8NK85Z
TO-220FP
Tube
October 2006
Downloaded from Elcodis.com electronic components distributor
Rev 5
1/15
www.st.com
15
1 page  
STP8NK85Z - STF8NK85Z
2 Electrical characteristics
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V(BR)DSS
Drain-source
Breakdown voltage
ID =1MA, VGS = 0
850
V
IDSS
Zero Gate voltage
Drain current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125°C
1 µA
50 µA
IGSS
Gate-body leakage
Current (VDS = 0)
VGS = ± 20 V
± 10 µA
VGS(th)
t(s)RDS(on)
Gate threshold voltage
Static drain-source on
resistance
VDS = VGS, ID = 100 µA
VGS = 10 V, ID = 3.35 A
3 3.75 4.5
1.1 1.4
V
Ω
ucTable 6. Dynamic
rodSymbol
Parameter
Test conditions
Min. Typ. Max. Unit
Pgfs (1) Forward transconductance VDS = 15v, ID = 3.35 A
teCiss
leCoss
soCrss
Input capacitance
Output capacitance
VDS = 25 V, f = 1 MHz,
Reverse transfer capacitance VGS = 0
ObCoss eq. (2)
Equivalent output
capacitance
VDS =0V, VDS = 0V to 680V
6
1870
190
44
75
S
pF
pF
pF
pF
) -td(on)
t(str
ctd(off)
utf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 425 V, ID = 3.35 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 18)
rodtr(Voff)
tr
Ptc
Off-voltage rise time
Fall time
Cross-over time
VDD = 680 V, ID = 6.7 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 20)
teQg Total gate charge
le Qgs Gate-source charge
so Qgd Gate-drain charge
VDD = 680 V, ID = 6.7 A,
VGS = 10 V
(see Figure 19)
Ob 1. Pulsed: pulse duration=300µs, duty cycle 1.5%
26 ns
19 ns
58 ns
18 ns
12 ns
10 ns
24 ns
60 nC
12 84 nC
35 nC
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Downloaded from Elcodis.com electronic components distributor
5/15
5 Page 
STP8NK85Z - STF8NK85Z
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
Obsolete Product(s) - Obsolete Product(s)
Downloaded from Elcodis.com electronic components distributor
11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet F8NK85Z.PDF ] | |
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