PDF RMS2061EB68EAW-1600 Data sheet ( Hoja de datos )

Número de pieza	RMS2061EB68EAW-1600
Descripción	DDR3 SDRAM 240Pin Registered DIMM
Fabricantes	Ramaxel
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No Preview Available ! RMS2061EB68EAW-1600 DATA SHEET DDR3 SDRAM 240Pin Registered DIMM Based on Elpida 4Gb B-die 78-ball FBGA With Lead-Free (RoHS compliant) Ramaxel Technology reserves the right to change products or specifications without notice. © 2013 Ramaxel Technology Co., Ltd. All rights reserved. Ver1.0 / November. 2013 1/14 1 page RMS2061EB68EAW-1600 Pin Assignments Pin Front Pin Back Pin Front Pin Back Pin Front Pin Back Pin Front Pin Back 1 VREFDQ 121 2 VSS 122 VSS DQ4 31 32 3 DQ0 123 DQ5 33 4 DQ1 124 VSS 34 DM0/ 5 VSS 125 TDQS95 35 6 DQS 0 NC/ 126 TDQS95 36 7 DQS0 127 VSS 37 8 VSS 128 DQ6 38 9 DQ2 129 DQ7 39 10 DQ3 130 VSS 40 11 VSS 131 DQ12 41 12 DQ8 132 DQ13 42 13 DQ9 133 VSS 43 DM1/ 14 VSS 134 TDQS105 44 15 DQS 1 NC/ 135 TDQS105 45 16 DQS1 136 VSS 46 17 VSS 137 DQ14 47 18 DQ10 138 DQ15 48 DQ25 VSS DQS 3 DQS3 VSS DQ26 DQ27 VSS NC NC VSS DQS 8 DQS8 VSS NC NC VSS NC 151 VSS 61 A3 181 DM3/ 152 TDQS125 62 VDD 182 153 NC/ TDQS125 63 CK1/NC3 183 154 VSS 64 CK1/NC3 184 155 DQ30 65 VDD 185 A1 VDD VDD CK0 CK0 91 DQ41 211 VSS DM5/ 92 VSS 212 TDQS14 93 DQS 5 NC/ 213 TDQS14 94 DQS5 214 VSS 95 VSS 215 DQ46 156 DQ31 66 VDD 186 VDD 96 DQ42 216 DQ47 157 VSS 67 VREFCA 187 EVENT 97 DQ43 217 VSS 158 NC 68 NC 188 A0 98 VSS 218 DQ52 159 NC 69 VDD 189 VDD 99 DQ48 219 DQ53 160 VSS 70 A10/AP 190 BA1 100 DQ49 220 VSS DM8/ DM6/ 161 TDQS175 71 BA0 191 VDD 101 VSS 221 TDQS155 NC/ 162 TDQS175 72 VDD 192 RAS 102 DQS 6 NC/ 222 TDQS155 163 VSS 73 WE 193 S 0 103 DQS6 223 VSS 164 NC 74 CAS 194 VDD 104 VSS 224 DQ54 165 NC 75 VDD 195 ODT0 105 DQ50 225 DQ55 166 VSS 76 S1/NC2 196 A13 106 DQ51 226 VSS 167 NC, TEST4 77 ODT1/NC2 197 VDD 107 VSS 227 DQ60 168 RESET 78 VDD 198 S 3 108 DQ56 228 DQ61 19 DQ11 139 VSS 49 NC 169 CKE1/NC2 79 NC 199 VSS 109 DQ57 229 VSS DM7/ 20 VSS 140 DQ20 50 CKE0 170 VDD 80 VSS 200 DQ36 110 VSS 230 TDQS165 21 DQ16 141 DQ21 51 VDD 171 A15 81 DQ32 201 DQ37 111 DQS 7 NC/ 231 TDQS165 22 DQ17 142 VSS 52 BA2 172 A14 82 DQ33 202 VSS 112 DQS7 232 VSS DM2/ DM4/ 23 VSS 143 TDQS115 53 NC 173 VDD 83 VSS 203 TDQS135 113 VSS 233 DQ62 24 DQS 2 NC/ 144 TDQS115 54 VDD 174 A12 84 DQS 4 NC 204 /TDQS135 114 DQ58 234 DQ63 25 DQS2 145 VSS 55 A11 175 A9 85 DQS4 205 DQS5 115 DQ59 235 VSS 26 VSS 146 DQ22 56 A7 176 VDD 86 VSS 206 DQ38 116 VSS 236 VDDSPD 27 DQ18 147 DQ23 57 VDD 177 A8 84 DQ34 207 DQ39 117 SA0 237 SA1 28 DQ19 148 VSS 58 A5 178 A6 88 DQ35 208 VSS 118 SCL 238 SDA 29 VSS 149 DQ28 59 A4 179 VDD 89 VSS 209 DQ44 119 SA2 239 VSS 30 DQ24 150 DQ29 60 VDD 180 A3 90 DQ40 210 DQ45 120 VTT 240 VTT Notes 1. NC = No Connect, NU = Not Useable. 2. S1, ODT1,CKE1: Used for dual-rank DIMMs; NC on single-rank DIMMs 3. CK1,NC and CK1 ,NC : Used for dual-rank DIMMs; not used on single-rank DIMMs, but terminated 4. TEST used by memory bus analysis tools (unused on memory DIMMs) 5.DM[0:8] Connected to DM on x8 DRAMs, UDM or LDM on x16 UDIMM DRAMs,DM8 is not used on x64 UDIMMs;NC,TDQS[0:8] and TDQS[0: 8] are not used on UDIMMs. Ver1.0 / November. 2013 5/14 5 Page SPD Matrix RMS2061EB68EAW-1600 Byte No. Function described 0 Number of Serial PD Bytes Written/ SPD Device Size / CRC Coverage 1 SPD Revision 2 Key Byte / DRAM Device Type 3 Key Byte / Module Type 4 SDRAM Density and Banks 5 SDRAM Addressing 6 Module Nominal Voltage, VDD 7 Module Organization 8 Module Memory Bus Width 9 Fine Timebase (FTB) Dividend/Divisor 10 Medium Timebase (MTB) Dividend 11 Medium Timebase (MTB) Divisor 12 SDRAM Minimum Cycle Time (tCKmin) 13 Reserved 14 CAS Latencies Supported, LSB 15 CAS Latencies Supported, MSB 16 Minimum CAS Latency Time (tAAmin) 17 Minimum Write Recovery Time (tWRmin) 18 Minimum RAS# to CAS# Delay Time (tRCDmin) 19 Minimum Row Active to Row Active Delay Time (tRRDmin) 20 Minimum Row Precharge Delay Time (tRPmin) 21 Upper Nibbles for tRAS and tRC 22 Minimum Active to Precharge Delay Time (tRASmin), LSB 23 Minimum Active to Active/Refresh Delay Time (tRCmin), LSB 24 Minimum Refresh Recovery Delay Time (tRFCmin), LSB 25 Minimum Refresh Recovery Delay Time (tRFCmin), MSB 26 Minimum Internal Write to Read Command Delay Time (tWTRmin) 27 Minimum Internal Read to Precharge Command Delay Time (tRTPmin) 28 Upper Nibble for tFAW 29 Minimum Four Activate Window Delay Time (tFAWmin) 30 SDRAM Optional Features 31 SDRAM Thermal and Refresh Options 32 Module Thermal Sensor 33 34-59 SDRAM Device Type Reserved 60 Module Nominal Height 61 Module Maximun Thickness 62 Reference Raw Card Used 63 DIMM Module Attributes 64 RDIMM Thermal Heat Spreader Solution 65 Register Manufacturer ID Code, LSB Ver1.0 / November. 2013 11/14 Function support 176/256/0-116 Version 1.1 DDR3 SDRAM RDIMM 8 banks,4Gb 16 Row×10 Col 1.5V 2Ranks x8 72bits/ECC 2.5ps 0.125ns DDR3 1600 Reserved 11,10,9,8,7,6,5, - 13.125ns 15ns 13.125ns 6ns 13.125ns Refer to Byte22,23 35ns 48.125ns 260ns 260ns 7.5ns 7.5ns 30ns 30ns DLL-OFF,RZQ/7,6 PASR,2X at 85-95℃, 0-95℃ incorporated Standard Reserved 18.75 F:1-2mm, B:1-2mm Raw Card: L1 1 row,1 register Not incorporated Montage Hex 92 11 0B 01 04 21 00 09 0B 52 01 08 0A 00 FE 00 69 78 69 30 69 11 18 81 20 08 3C 3C 00 F0 83 81 80 00 00 04 11 0A 05 00 86 11 Page

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