PDF SEN04G64D2BC2MT-25W Data sheet ( Hoja de datos )

Número de pieza	SEN04G64D2BC2MT-25W
Descripción	SDRAM SO-DIMM
Fabricantes	Swissbit
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No Preview Available ! preliminary Data Sheet Rev.0.9 12.07.2013 4GB DDR2 – SDRAM SO-DIMM 200 Pin SO-DIMM SEN04G64D2BC2MT-xx[W]R 4GByte in FBGA Technology RoHS compliant Options: Data Rate / Latency DDR2 667 MT/s CL5 DDR2 800 MT/s CL6 Marking -30 -25  Module Density 4GByte with 16 dies and 2 ranks  Standard Grade (TA) (TC) Grade W (TA) (TC) 0°C to 70°C 0°C to 85°C -40°C to 85°C -40°C to 95°C * The refresh rate has to be doubled when 85°C>TC>95°C Environmental Requirements:  Operating temperature (ambient) Standard Grade 0°C to 70°C Grade W -40°C to 85°C   Operating Humidity 10% to 90% relative humidity, noncondensing  Operating Pressure 105 to 69 kPa (up to 10000 ft.)  Storage Temperature -55°C to 100°C  Storage Humidity 5% to 95% relative humidity, noncondensing  Storage Pressure 1682 PSI (up to 5000 ft.) at 50°C Features:  200-pin 64-bit Small Outline, Dual-In-Line Double Data Rate Synchronous DRAM Module  Module organization: dual rank 512M x 64  VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V  1.8V I/O ( SSTL_18 compatible)  Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms  Serial Presence Detect with EEPROM  Gold-contact pad  This module is fully pin and functional compatible to the JEDEC PC2-6400 spec. and JEDEC- Standard MO-224. (see www.jedec.org)  The pcb and all components are manufactured according to the RoHS compliance specification [EU Directive 2002/95/EC Restriction of Hazardous Substances (RoHS)]  DDR2 - SDRAM component Micron MT47H256M8EB-25E:C  256Mx8 DDR2 SDRAM in FBGA-60 package  Four bit prefetch architecture  DLL to align DQ and DQS transitions with CK  Eight internal device banks for concurrent operation  Programmable CAS latency (CL)  Posted CAS additive latency (AL)  WRITE latency = READ latency – 1 tCK  Programmable burst length: 4 or 8  Adjustable data-output drive strength  On-die termination (ODT) Figure: mechanical dimensions1 Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 www.swissbit.com eMail: [email protected] 1if no tolerances specified ± 0.15mm Page 1 of 16 1 page preliminary Data Sheet Rev.0.9 12.07.2013 FUNCTIONAL BLOCK DIAGRAMM 4096MB DDR2 SDRAM SODIMM, 2 RANKS AND 16 COMPONENTS CKE1 ODT1 S1 CKE0 ODT0 S0 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D1 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D9 DQS4 DQS4 DM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D2 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D10 DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D3 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D11 DQS5 DQS5 DM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D4 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D12 DQS2 DQS2 DM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D5 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D13 DQS6 DQS6 DM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D6 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D14 DQS3 DQS3 DM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D7 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D15 DQS7 DQS7 DM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D8 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D16 BA0-BA2 A0-A14 RAS CAS WE SCL R1 0O R2 0O BA0-BA2: SDRAM D1-D16 A0-A14: SDRAM D1-D16 RAS: SDRAM D1-D16 CAS: SDRAM D1-D16 WE: SDRAM D1-D16 VDDSPD VREF VDD VSS WP/ EVENT SA0 SA1 SA2 SA0 SA1 SDA Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 SPD D0-D7 D0-D7 D0-D7/SPD www.swissbit.com eMail: [email protected] Page 5 of 16 5 Page preliminary Data Sheet Rev.0.9 12.07.2013 DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Continued) (0°C ≤ TCASE ≤ + 85°C; VDDQ = +1.8V ± 0.1V, VDD = +1.8V ± 0.1V) AC CHARACTERISTICS PARAMETER ODT power-down exit latency ODT enable from MRS command Exit active power-down to READ command, MR [bit 12 = 0] Exit active power-down to READ command, MR [bit 12 = 1] Exit precharge power-down to any non- READ command CKE minimum high/low time SYMBOL tAXPD tMOD tXARD 6400-6-6-6 Min MAX 8- 12 - 2- tXARDS 8 – AL - tXP 2 - tCKE 3- 5300-5-5-5 MIN MAX 8- 12 - 2- 7 – AL - 2- 3- Unit tCK ns tCK tCK tCK tCK Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 www.swissbit.com eMail: [email protected] Page 11 of 16 11 Page

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