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PDF K4T1G044QF-BCF7 Data sheet ( Hoja de datos )

Número de pieza K4T1G044QF-BCF7
Descripción 1Gb F-die DDR2 SDRAM
Fabricantes Samsung 
Logotipo Samsung Logotipo



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No Preview Available ! K4T1G044QF-BCF7 Hoja de datos, Descripción, Manual

Rev. 1.11, Sep. 2010
K4T1G044QF
K4T1G084QF
K4T1G164QF
1Gb F-die DDR2 SDRAM
60FBGA/84FBGA with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2010 Samsung Electronics Co., Ltd. All rights reserved.
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K4T1G044QF-BCF7 pdf
K4T1G044QF
K4T1G084QF
K4T1G164QF
datasheet
3. Package pinout/Mechanical Dimension & Addressing
3.1 x4 Package Pinout (Top view) : 60ball FBGA Package
Rev. 1.11
DDR2 SDRAM
1
2
3 456 7
8
9
A VDD NC VSS
B NC VSSQ DM
C VDDQ DQ1 VDDQ
D
NC
VSSQ
DQ3
E
VDDL
VREF
VSS
F
CKE
WE
G BA2 BA0 BA1
H
A10/AP
A1
J VSS
A3
A5
K A7 A9
L VDD A12
NC
VSSQ
DQS
VDDQ
DQ2
VSSDL
RAS
CAS
A2
A6
A11
NC
DQS
VSSQ
DQ0
VSSQ
CK
CK
CS
A0
A4
A8
A13
VDDQ
NC
VDDQ
NC
VDD
ODT0
VDD
VSS
NOTE : VDDL and VSSDL are power and ground for the DLL. It is recommended that they be isolated on the device from VDD,VDDQ, VSS, and VSSQ.
Ball Locations (x4)
Populated ball
Ball not populated
Top view
(See the balls through package)
123456789
A
B
C
D
E
F
G
H
J
K
L
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K4T1G044QF-BCF7 arduino
K4T1G044QF
K4T1G084QF
K4T1G164QF
datasheet
5. DDR2 SDRAM Addressing
1Gb Addressing
Configuration
256Mb x4
128Mb x 8
# of Bank 8 8
Bank Address
BA0 ~ BA2
BA0 ~ BA2
Auto precharge
A10/AP
A10/AP
Row Address
A0 ~ A13
A0 ~ A13
Column Address
A0 ~ A9,A11
A0 ~ A9
* Reference information: The following tables are address mapping information for other densities.
256Mb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
64Mb x4
4
BA0,BA1
A10/AP
A0 ~ A12
A0 ~ A9,A11
32Mb x 8
4
BA0,BA1
A10/AP
A0 ~ A12
A0 ~ A9
512Mb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
128Mb x4
4
BA0,BA1
A10/AP
A0 ~ A13
A0 ~ A9,A11
64Mb x 8
4
BA0,BA1
A10/AP
A0 ~ A13
A0 ~ A9
2Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
512Mb x4
8
BA0 ~ BA2
A10/AP
A0 ~ A14
A0 ~ A9,A11
256Mb x 8
8
BA0 ~ BA2
A10/AP
A0 ~ A14
A0 ~ A9
4Gb
Configuration
# of Bank
Bank Address
Auto precharge
Row Address
Column Address
1 Gb x4
8
BA0 ~ BA2
A10/AP
A0 - A15
A0 - A9,A11
512Mb x 8
8
BA0 ~ BA2
A10/AP
A0 - A15
A0 - A9
Rev. 1.11
DDR2 SDRAM
64Mb x16
8
BA0 ~ BA2
A10/AP
A0 ~ A12
A0 ~ A9
16Mb x16
4
BA0,BA1
A10/AP
A0 ~ A12
A0 ~ A8
32Mb x16
4
BA0,BA1
A10/AP
A0 ~ A12
A0 ~ A9
128Mb x16
8
BA0 ~ BA2
A10/AP
A0 ~ A13
A0 ~ A9
256Mb x16
8
BA0 ~ BA2
A10/AP
A0 - A14
A0 - A9
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