00table of contents
1 signal descriptions
2 system level description
2.1 overview
2.2 architecture
2.3 format and frame
2.4 I/O control
2.5 MIPI interface
2.6 power management
2.6.1 power up sequence
2.6.2 power down sequence
2.7 reset
2.7.1 power ON reset
2.7.2 software reset
2.8 hardware and software standby
2.8.1 hardware standby
2.8.2 software standby
2.9 system clock control
2.9.1 PLL1
2.9.2 PLL2
2.10 serial camera control bus (SCCB) interface
2.10.1 data transfer protocol
2.10.2 message format
2.10.3 read / write operation
2.10.4 SCCB timing
2.11 group write
2.12 hold
2.13 launch
2.13.1 launch mode 1 - quick manual launch
2.13.2 launch mode 2 - delay manual launch
2.13.3 launch mode 3 - quick auto launch
2.13.4 launch mode 4: delay auto launch
2.13.5 launch mode 5: repeat launch
1-1
2-1
2-1
2-1
2-4
2-5
2-5
2-6
2-6
2-9
2-13
2-13
2-13
2-14
2-14
2-14
2-15
2-15
2-15
2-19
2-19
2-19
2-20
2-23
2-24
2-25
2-25
2-25
2-26
2-26
2-26
2-26
10.23.2013
PRELIMINARY SPECIFICATION
proprietary to OmniVision Technologies
iii
00list of tables
table 1-1 signal descriptions
table 1-2 configuration under various conditions
table 1-3 pad symbol and equivalent circuit
table 2-1 non HDR mode frame rate
table 2-2 staggered HDR mode frame rate
table 2-3 I/O control registers
table 2-4 power up sequence
table 2-5 power up sequence timing constraints
table 2-6 power down sequence
table 2-7 power down sequence timing constraints
table 2-8 hardware and standby description
table 2-9 PLL speed limitation
table 2-10 PLL registers
table 2-11 sample PLL configuration
table 2-12 SCCB interface timing specifications
table 2-13 context switching control
table 3-1 binning-related registers
table 4-1 mirror and flip registers
table 4-2 image cropping and windowing control functions
table 4-3 test pattern registers
table 4-4 gain/exposure control registers
table 4-5 timing control
table 4-6 timing control
table 4-7 timing control
table 4-8 AVG registers
table 4-9 BLC registers
table 4-10 OTP control registers
table 4-11 temperature sensor functions
table 4-12 FREX strobe control registers
table 5-1 DSP top registers
table 5-2 pre_ISP registers
table 5-3 OTP for cluster cancellation registers
1-1
1-3
1-5
2-4
2-4
2-5
2-6
2-6
2-9
2-10
2-14
2-15
2-16
2-18
2-23
2-24
3-3
4-1
4-2
4-6
4-7
4-9
4-9
4-10
4-11
4-13
4-14
4-15
4-22
5-1
5-3
5-5
10.23.2013
PRELIMINARY SPECIFICATION
proprietary to OmniVision Technologies
ix