PDF R1WV6416RSD-7S Datasheet ( Hoja de datos )

		


R1WV6416R Series
64Mb Advanced LPSRAM (4M word x 16bit / 8M word x 8bit)
REJ03C0368-0100
Rev.1.00
2009.05.07
Description
The R1WV6416R Series is a family of low voltage 64-Mbit static RAMs organized as 4,194,304-word by
16-bit, fabricated by Renesas’s high-performance 0.15um CMOS and TFT technologies.
The R1WV6416R Series is suitable for memory applications where a simple interfacing, battery operating
and battery backup are the important design objectives.
The R1WV6416R Series is provided in 48-pin thin small outline package [TSOP (I): 12mm x 20mm with
pin pitch of 0.5mm], 52-pin micro thin small outline package [µTSOP (II): 10.79mm x 10.49mm with pin pitch
of 0.4mm] and 48-ball fine pitch ball grid array [f-BGA] package. It gives the best solution for compaction of
mounting area as well as flexibility of wiring pattern of printed circuit boards.
Features
• Single 2.7~3.6V power supply
• Small stand-by current: 8 µA (3.0V, typical)
• No clocks, No refresh
• All inputs and outputs are TTL compatible.
• Easy memory expansion by CS1#, CS2, LB# and UB#
• Common Data I/O
• Three-state outputs: OR-tie Capability
• OE# prevents data contention on the I/O bus
Ordering Information
Type No.
R1WV6416RSA-5S%
R1WV6416RSA-7S%
R1WV6416RSD-5S%
R1WV6416RSD-7S%
R1WV6416RBG-5S%
R1WV6416RBG-7S%
Access time
55 ns
70 ns
55 ns
70 ns
55 ns
70 ns
Package
12mm x 20mm 48-pin plastic TSOP (I)
(normal-bend type) (48P3R)
350 mil 52-pin plastic μ-TSOP (II)
(normal-bend type) (52PTG)
f-BGA 0.75mm pitch 48-ball
% - Temperature version; see table below
% Temperature Range
R 0 ~ +70 °C
I -40 ~ +85 °C
REJ03C0368-0100, Rev.1.00, 2009.05.07
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R1WV6416R Series
Operation Table
CS1# CS2 BYTE# LB# UB# WE# OE# DQ0~7 DQ8~14
HX
X X X X X High-Z High-Z
XL
X X X X X High-Z High-Z
XX
H H H X X High-Z High-Z
L
H
H
LHLX
Din High-Z
L
H
H
L
H
H
L
Dout
High-Z
L H H L H H H High-Z High-Z
L H H H L L X High-Z Din
L H H H L H L High-Z Dout
L H H H L H H High-Z High-Z
L
H
H
LLLX
Din
Din
L H H L L H L Dout Dout
L H H L L H H High-Z High-Z
LH
L
LLLX
Din High-Z
LH
L
L
L
H
L
Dout
High-Z
LH
L L L H H High-Z High-Z
Note1. H: VIH L:VIL X: VIH or VIL
2. BYTE# pin is supported for 48-pin TSOP (I) and 52-pin µTSOP (II) packages.
3. When apply BYTE# =“L”, please assign LB#=UB#=“L”.
DQ15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Din
Dout
High-Z
Din
Dout
High-Z
A-1
A-1
A-1
Operation
Stand-by
Stand-by
Stand-by
Write in lower byte
Read in lower byte
Output disable
Write in upper byte
Read in upper byte
Output disable
Word write
Word read
Output disable
Byte write
Byte read
Output disable
Absolute Maximum Ratings
Parameter
Symbol
Value
Power supply voltage relative to Vss
Terminal voltage on any pin relative to Vss
Vcc
VT
-0.5 to +4.6
-0.5*1 to Vcc+0.3*2
Power dissipation
PT 0.7
Operation temperature
Topr*3
R ver.
I ver.
0 to +70
-40 to +85
Storage temperature range
Tstg -65 to 150
Storage temperature range under bias
Tbias*3
Note 1. –2.0V in case of AC (Pulse width ≤30ns)
R ver.
I ver.
0 to +70
-40 to +85
2. Maximum voltage is +4.6V.
3. Ambient temperature range depends on R/I-version. Please see table on page 1.
unit
V
V
W
°C
°C
°C
°C
°C
REJ03C0368-0100, Rev.1.00, 2009.05.07
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R1WV6416R Series
Timing Waveforms
Read Cycle*1
A0~21
(Word Mode)
A -1~21
(Byte Mode)
LB#,UB#
CS1#
CS2
WE#
WE# = “H” level
VIH
VIL
OE#
DQ0~15
(Word Mode)
DQ0~7
(Byte Mode)
tRC
tBLZ
tCLZ1
tCLZ2
tAA
tBA
tACS1
tACS2
tOH
tBHZ
tCHZ1
tCHZ2
tOLZ
High impedance
tOE
tOHZ
Valid Data
Note1. BYTE# ≥ Vcc – 0.2V or BYTE# ≤ 0.2V
REJ03C0368-0100, Rev.1.00, 2009.05.07
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