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PDF K4T56163QN Data sheet ( Hoja de datos )

Número de pieza K4T56163QN
Descripción 256Mb N-die DDR2 SDRAM
Fabricantes Samsung 
Logotipo Samsung Logotipo



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No Preview Available ! K4T56163QN Hoja de datos, Descripción, Manual

Rev. 1.03, Feb. 2010
K4T56163QN
256Mb N-die DDR2 SDRAM
84FBGA with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2010 Samsung Electronics Co., Ltd. All rights reserved.
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1 page




K4T56163QN pdf
K4T56163QN
datasheet
3. Package pinout/Mechanical Dimension & Addressing
3.1 x16 Package Pinout (Top view) : 84ball FBGA Package
Rev. 1.03
DDR2 SDRAM
1
VDD
DQ14
VDDQ
DQ12
VDD
DQ6
VDDQ
DQ4
VDDL
NC
VSS
VDD
2
NC
VSSQ
DQ9
VSSQ
NC
VSSQ
DQ1
VSSQ
VREF
CKE
BA0
A10/AP
A3
A7
A12
3
VSS
UDM
VDDQ
DQ11
VSS
LDM
VDDQ
DQ3
VSS
WE
BA1
A1
A5
A9
NC
789
A
VSSQ
UDQS
VDDQ
B
UDQS
VSSQ
DQ15
C
VDDQ
DQ8
VDDQ
D
DQ10
VSSQ
DQ13
E
VSSQ
LDQS
VDDQ
F
LDQS
VSSQ
DQ7
G
VDDQ
DQ0
VDDQ
H
DQ2
VSSQ
DQ5
J VSSDL CK
VDD
K RAS CK
ODT
L CAS
M A2
N A6
P A11
R NC
CS
A0
A4
A8
NC
VDD
VSS
NOTE :
1. VDDL and VSSDL are power and ground for the DLL.
2. In case of only 8 DQs out of 16 DQs are used, LDQS, LDQSB and DQ0~7 must be used.
3. A12 ball is only for MRS and EMRS mode setting.
Ball Locations (x16)
: Populated Ball
+ : Depopulated Ball
Top View
(See the balls through the Package)
123456789
A
B
C
D
E
F
G
H
J
K+
L
M+
N
P+
R
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+++
+
+
+
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5 Page





K4T56163QN arduino
K4T56163QN
datasheet
Rev. 1.03
DDR2 SDRAM
7.6 Differential input AC logic Level
Symbol
VID(AC)
VIX(AC)
Parameter
AC differential input voltage
AC differential cross point voltage
Min.
0.5
0.5 * VDDQ - 0.175
Max.
VDDQ + 0.6
0.5 * VDDQ + 0.175
Units
V
V
NOTE
1
2
NOTE :
1. VID(AC) specifies the input differential voltage |VTR -VCP | required for switching, where VTR is the true input signal (such as CK, DQS, LDQS or UDQS) and VCP is the com-
plementary input signal (such as CK, DQS, LDQS or UDQS). The minimum value is equal to VIH (AC) - VIL(AC).
2. The typical value of VIX(AC) is expected to be about 0.5 * VDDQ of the transmitting device and VIX(AC) is expected to track variations in VDDQ . VIX(AC) indicates the voltage
at which differential input signals must cross.
3. For information related to VPEAK value, Refer to overshoot/undershoot specification in device operation and timing datasheet; maximum peak ampli-
tude allowed for overshoot and undershoot.
VTR
VCP
VDDQ
VID Crossing point
VIX or VOX
VSSQ
Figure 2. Differential signal levels
7.7 Differential AC output parameters
Symbol
Parameter
Min.
Max.
VOX(AC) AC differential cross point voltage
0.5 * VDDQ - 0.125
0.5 * VDDQ + 0.125
NOTE :
1. The typical value of VOX(AC) is expected to be about 0.5 * VDDQ of the transmitting device and VOX(AC) is expected to track variations in VDDQ .
voltage at which differential output signals must cross.
Units
V
NOTE
1
VOX(AC) indicates the
8. ODT DC electrical characteristics
PARAMETER/CONDITION
Rtt effective impedance value for EMRS(A6,A2)=0,1; 75 ohm
Rtt effective impedance value for EMRS(A6,A2)=1,0; 150 ohm
Rtt effective impedance value for EMRS(A6,A2)=1,1; 50 ohm
Deviation of VM with respect to VDDQ/2
SYMBOL
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
delta VM
MIN NOM MAX UNITS NOTE
60 75 90 ohm
1
120 150 180 ohm
1
40 50 60 ohm
1
-6
+6 %
1
NOTE : Test condition for Rtt measurements
Measurement Definition for Rtt(eff): Apply VIH (AC) and VIL (AC) to test pin separately, then measure current I(VIH (AC)) and I( VIL (AC)) respectively. VIH (AC), VIL
(AC)(DC), and VDDQ values defined in SSTL_18
Rtt(eff) = VIH (AC) - VIL (AC)
I(VIH (AC)) - I(VIL (AC))
delta VM =
2 x VM
-1
VDDQ
x 100%
Measurement Definition for VM: Measure voltage (VM) at test pin (midpoint) with no load.
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