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PDF SAM9G35 Data sheet ( Hoja de datos )
| Número de pieza | SAM9G35 | |
| Descripción | AT91SAM ARM-based Embedded MPU | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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SAM9G35
Atmel | SMART ARM-based Embedded MPU
DATASHEET
Description
The SAM9G35 is a member of the Atmel® | SMART series of 400 MHz
ARM926EJ-S™ embedded microprocessor units. This MPU supports high
bandwidth communication and advanced user interfaces and is optimized for
industrial applications such as building automation, data loggers, POS terminals,
alarm systems and medical equipment.
The SAM9G35 features an advanced graphics LCD controller with 4-layer overlay
and 2D acceleration (picture-in-picture, alpha-blending, scaling, rotation, color
conversion) and a 10-bit ADC that supports 4-wire or 5-wire resistive touchscreen
panels. Multiple communication interfaces include a soft modem supporting
exclusively the Conexant SmartDAA line driver, HS USB Device and Host, FS
USB Host, 10/100 Mbps Ethernet MAC, two HS SDCard/SDIO/MMC interfaces,
USARTs, SPIs, I2S and TWIs.
The 10-layer bus matrix coupled with 2 x 8 DMA channels and dedicated DMAs
for the communication and interface peripherals ensure uninterrupted data
transfers with minimal processor overhead.
The External Bus Interface incorporates controllers for 4-bank and 8-bank
DDR2/LPDDR, SDRAM/LPSDRAM, static memories, as well as specific circuitry
for MLC/SLC NAND Flash with integrated ECC up to 24 bits.
The SAM9G35 is available in a 217-ball BGA package with 0.8 mm ball pitch.
Atmel-11053F-ATARM-SAM9G35-Datasheet_31-Aug-15
1 page  
Table 2-1. Signal Description List (Continued)
Signal Name
Function
Type
External Bus Interface - EBI
D0–D15
Data Bus
I/O
D16–D31
Data Bus
I/O
A0–A25
Address Bus
Output
NWAIT
External Wait Signal
Input
Static Memory Controller - SMC
NCS0–NCS5
Chip Select Lines
Output
NWR0–NWR3
Write Signal
Output
NRD
Read Signal
Output
NWE
Write Enable
Output
NBS0–NBS3
Byte Mask Signal
Output
NAND Flash Support
NFD0–NFD16
NAND Flash I/O
I/O
NANDCS
NAND Flash Chip Select
Output
NANDOE
NAND Flash Output Enable
Output
NANDWE
NAND Flash Write Enable
Output
DDR2/SDRAM/LPDDR Controller
SDCK,#SDCK
DDR2/SDRAM Differential Clock
Output
SDCKE
DDR2/SDRAM Clock Enable
Output
SDCS
DDR2/SDRAM Controller Chip Select
Output
BA[0..2]
Bank Select
Output
SDWE
DDR2/SDRAM Write Enable
Output
RAS-CAS
Row and Column Signal
Output
SDA10
SDRAM Address 10 Line
Output
DQS[0..1]
Data Strobe
I/O
DQM[0..3]
Write Data Mask
Output
High Speed MultiMedia Card Interface - HSMCI0–1
MCI0_CK, MCI1_CK
Multimedia Card Clock
I/O
MCI0_CDA, MCI1_CDA
Multimedia Card Slot Command
I/O
MCI0_DA0–MCI0_DA3
Multimedia Card 0 Slot A Data
I/O
MCI1_DA0–MCI1_DA3
Multimedia Card 1 Slot A Data
I/O
Universal Synchronous Asynchronous Receiver Transmitter - USARTx
SCKx
USARTx Serial Clock
I/O
TXDx
USARTx Transmit Data
Output
RXDx
USARTx Receive Data
Input
RTSx
USARTx Request To Send
Output
CTSx
USARTx Clear To Send
Input
Active Level
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
Low
Low
Low
Low
SAM9G35 [DATASHEET]
Atmel-11053F-ATARM-SAM9G35-Datasheet_31-Aug-15
5
5 Page 
Table 3-3. Pin Description BGA217 (Continued)
Primary
Alternate
PIO Peripheral A PIO Peripheral B PIO Peripheral C Reset State
Ball Power Rail I/O Type
Signal, Dir,
Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir PU, PD, ST
D1 VDDANA GPIO_CLK
PB4 I/O
ETXCK
I
TWD2
I/O
PIO, I, PU, ST
E3 VDDANA
GPIO
PB5 I/O
EMDIO I/O TWCK2 O
PIO, I, PU, ST
B3 VDDANA GPIO_ANA PB6 I/O
AD7
I
EMDC
O
PIO, I, PU, ST
C2 VDDANA GPIO_ANA PB7 I/O
AD8
I
ETXEN
O
PIO, I, PU, ST
C5 VDDANA GPIO_ANA PB8 I/O
AD9
I
PIO, I, PU, ST
C1 VDDANA GPIO_ANA PB9 I/O AD10 I ETX0 O PCK1 O
PIO, I, PU, ST
B2 VDDANA GPIO_ANA
PB10
I/O
AD11
I
ETX1 O PCK0 O
PIO, I, PU, ST
A3 VDDANA GPIO_ANA
PB11
I/O
AD0
I
PWM0
O
PIO, I, PU, ST
B4 VDDANA GPIO_ANA
PB12
I/O
AD1
I
PWM1
O
PIO, I, PU, ST
A2 VDDANA GPIO_ANA
PB13
I/O
AD2
I
PWM2
O
PIO, I, PU, ST
C4 VDDANA GPIO_ANA
PB14
I/O
AD3
I
PWM3
O
PIO, I, PU, ST
C3 VDDANA GPIO_ANA
PB15
I/O
AD4
I
PIO, I, PU, ST
A1 VDDANA GPIO_ANA
PB16
I/O
AD5
I
PIO, I, PU, ST
B1 VDDANA GPIO_ANA
PB17
I/O
AD6
I
PIO, I, PU, ST
D5 VDDANA
GPIO
PB18 I/O
IRQ I ADTRG I
PIO, I, PU, ST
E2 VDDIOP1
GPIO
PC0 I/O
LCDDAT0 O
TWD1
I/O PIO, I, PU, ST
F4 VDDIOP1
GPIO
PC1 I/O
LCDDAT1 O
TWCK1 O PIO, I, PU, ST
F3 VDDIOP1
GPIO
PC2 I/O
LCDDAT2 O
TIOA3
I/O PIO, I, PU, ST
H2 VDDIOP1
GPIO
PC3 I/O
LCDDAT3 O
TIOB3
I/O PIO, I, PU, ST
E1 VDDIOP1 GPIO
PC4 I/O
LCDDAT4 O
TCLK3
I PIO, I, PU, ST
G4 VDDIOP1 GPIO
PC5 I/O
LCDDAT5 O
TIOA4
I/O PIO, I, PU, ST
F2 VDDIOP1
GPIO
PC6 I/O
LCDDAT6 O
TIOB4
I/O PIO, I, PU, ST
F1 VDDIOP1 GPIO
PC7 I/O
LCDDAT7 O
TCLK4
I PIO, I, PU, ST
G1 VDDIOP1 GPIO
PC8 I/O
LCDDAT8 O
UTXD0
O PIO, I, PU, ST
G3 VDDIOP1 GPIO
PC9 I/O
LCDDAT9 O
URXD0
I PIO, I, PU, ST
G2 VDDIOP1 GPIO
PC10 I/O
LCDDAT10 O
PWM0
O PIO, I, PU, ST
H3 VDDIOP1 GPIO
PC11 I/O
LCDDAT11 O
PWM1
O PIO, I, PU, ST
J3 VDDIOP1 GPIO
PC12 I/O
LCDDAT12 O
TIOA5
I/O PIO, I, PU, ST
L2 VDDIOP1 GPIO
PC13 I/O
LCDDAT13 O
TIOB5
I/O PIO, I, PU, ST
H1 VDDIOP1
GPIO
PC14 I/O
LCDDAT14 O
TCLK5
I PIO, I, PU, ST
J2 VDDIOP1 GPIO_CLK
PC15 I/O
LCDDAT15 O
PCK0
O PIO, I, PU, ST
J1 VDDIOP1 GPIO
PC16 I/O
LCDDAT16 O
UTXD1
O PIO, I, PU, ST
L1 VDDIOP1
GPIO
PC17 I/O
LCDDAT17 O
URXD1
I PIO, I, PU, ST
K2 VDDIOP1
GPIO
PC18 I/O
LCDDAT18 O
PWM0
O PIO, I, PU, ST
N3 VDDIOP1
GPIO
PC19 I/O
LCDDAT19 O
PWM1
O PIO, I, PU, ST
K1 VDDIOP1
GPIO
PC20 I/O
LCDDAT20 O
PWM2
O PIO, I, PU, ST
M3 VDDIOP1 GPIO
PC21 I/O
LCDDAT21 O
PWM3
O PIO, I, PU, ST
P3 VDDIOP1 GPIO
PC22 I/O
LCDDAT22 O
PIO, I, PU, ST
SAM9G35 [DATASHEET]
Atmel-11053F-ATARM-SAM9G35-Datasheet_31-Aug-15
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SAM9G35.PDF ] | |
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