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PDF K20P64M50SF0 Data sheet ( Hoja de datos )

Número de pieza K20P64M50SF0
Descripción K20 Sub-Family
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo



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No Preview Available ! K20P64M50SF0 Hoja de datos, Descripción, Manual

Freescale Semiconductor
Data Sheet: Technical Data
Document Number: K20P64M50SF0
Rev. 4 5/2012
K20 Sub-Family
Supports the following:
MK20DN32VLH5, MK20DX32VLH5,
MK20DN64VLH5, MK20DX64VLH5,
MK20DN128VLH5, MK20DX128VLH5,
MK20DN32VMP5, MK20DX32VMP5,
MK20DN64VMP5, MK20DX64VMP5,
MK20DN128VMP5, MK20DX128VMP5
Features
Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
Performance
– Up to 50 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
Memories and memory interfaces
– Up to 128 KB program flash.
– Up to 32 KB FlexNVM on FlexMemory devices
– 2 KB FlexRAM on FlexMemory devices
– Up to 16 KB RAM
– Serial programming interface (EzPort)
Clocks
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
System peripherals
– Multiple low-power modes to provide power
optimization based on application requirements
– 4-channel DMA controller, supporting up to 41
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
K20P64M50SF0
Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– 128-bit unique identification (ID) number per chip
Analog modules
– 16-bit SAR ADC
– Two analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– Voltage reference
Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timer
– Two-channel quadrature decoder/general purpose
timer
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
Communication interfaces
– USB full-/low-speed On-the-Go controller with on-
chip transceiver
– SPI module
– I2C module
– Three UART modules
– I2S module
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2011–2012 Freescale Semiconductor, Inc.

1 page




K20P64M50SF0 pdf
3.1 Definition: Operating requirement
Terminology and guidelines
An operating requirement is a specified value or range of values for a technical
characteristic that you must guarantee during operation to avoid incorrect operation and
possibly decreasing the useful life of the chip.
3.1.1 Example
This is an example of an operating requirement, which you must meet for the
accompanying operating behaviors to be guaranteed:
Symbol
VDD
Description
Min.
1.0 V core supply
voltage
0.9
Max.
1.1
Unit
V
3.2 Definition: Operating behavior
An operating behavior is a specified value or range of values for a technical
characteristic that are guaranteed during operation if you meet the operating requirements
and any other specified conditions.
3.2.1 Example
This is an example of an operating behavior, which is guaranteed if you meet the
accompanying operating requirements:
Symbol
IWP
Description
Digital I/O weak pullup/ 10
pulldown current
Min.
Max.
130
Unit
µA
3.3 Definition: Attribute
An attribute is a specified value or range of values for a technical characteristic that are
guaranteed, regardless of whether you meet the operating requirements.
Freescale Semiconductor, Inc.
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
5

5 Page





K20P64M50SF0 arduino
General
5.2 Nonswitching electrical specifications
5.2.1 Voltage and current operating requirements
Table 1. Voltage and current operating requirements
Symbol Description
VDD Supply voltage
VDDA
Analog supply voltage
VDD – VDDA VDD-to-VDDA differential voltage
VSS – VSSA VSS-to-VSSA differential voltage
VBAT
RTC battery supply voltage
VIH Input high voltage
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
Min.
1.71
1.71
–0.1
–0.1
1.71
Max.
3.6
3.6
0.1
0.1
3.6
0.7 × VDD
0.75 × VDD
Unit
V
V
V
V
V
V
V
Notes
VIL Input low voltage
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
— 0.35 × VDD V
— 0.3 × VDD V
VHYS
IICIO
IICcont
Input hysteresis
I/O pin DC injection current — single pin
• VIN < VSS-0.3V (Negative current injection)
• VIN > VDD+0.3V (Positive current injection)
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
• Negative current injection
• Positive current injection
0.06 × VDD
-3
-25
+3
+25
V
mA
mA
1
VRAM
VRFVBAT
VDD voltage required to retain RAM
VBAT voltage required to retain the VBAT register file
1.2
VPOR_VBAT
V
V
1. All analog pins are internally clamped to VSS and VDD through ESD protection diodes. If VIN is greater than VAIO_MIN
(=VSS-0.3V) and VIN is less than VAIO_MAX(=VDD+0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(VAIO_MIN-VIN)/|IIC|. The positive injection current limiting resistor is
calcualted as R=(VIN-VAIO_MAX)/|IIC|. Select the larger of these two calculated resistances.
Freescale Semiconductor, Inc.
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
11

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