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Product Description: T216XW02 TFT-LCD PANEL with RoHS guarantee
AUO Model Name: T216XW01 V0
Customer Part No/Project Name:
Customer Signature
Date AUO
2008/09/22
Approved By: PM Director / Frank Hsu
Reviewed By: RD Director / Hong Hong Jye
Reviewed By: Project Leader / Sarah Ke
Prepared By: PM / Hanson Wang
©Copyright AU Optronics, Inc.
April, 2007 All Rights Reserved.
No Reproduction and Redistribution Allowed
T216XW01 Ver0.0
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1. General Description
This specification applies to the 21.6 inch Color TFT-LCD Module T216XW01. This LCD module has a TFT
active matrix type liquid crystal panel 1366x768 pixels, and diagonal size of 21.6 inch. This module supports
1366x768 XGA-WIDE mode (Non-interlace).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray
scale or the brightness of the sub-pixel color is determined with an 8-bit gray scale signal for each dot.
The T260XW02 has been designed to apply the 8-bit 1 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are
very important.
This module is without any inverter card for backlight.
* General Information
Items
Active Screen Size
Display Area
Outline Dimension
Resolution
Pixel Pitch
Pixel Arrangement
Display mode
Display Colors
Typical White Luminance
Surface Treatment
Green
Specification
21.6 inches
477.417 (H) x 268.416 (V)
501 (H) × 297 (V) × 17.3 (D)
1366 x 768
0.1165 x 0.3495
RGB vertical stripe
Normally Black
16.7M (8-bit for R,G,B)
350 @ 8 mA
AG, Haze=11%, 3H
ROHS compliance
Unit
mm
mm
Pixels
Note
50.9cm diagonal
Without inverter
Colors
[cd/m2]
©Copyright AU Optronics, Inc.
April, 2007 All Rights Reserved.
No Reproduction and Redistribution Allowed
T216XW01 Ver0.0
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5 Page
3-3 Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing
should be satisfied with the following specifications for it’s proper operation.
* Timing Table
Signal
Vertical
Section
Horizontal
Section
LVDS Clock
Vertical
Frequency
Horizontal
Frequency
Item
Symbol
Period
Active
Blanking
Period
Active
Blanking
Frequency
Tv
Tdisp(v)
Tblk (v)
Th
Tdisp(h)
Tblk (h)
Fclk (1/Tclk)
Frequency
Fv
Frequency
Fh
Min.
784
16
1414
48
60
47
43
Typ.
806
768
38
1648
1366
282
80
60
48
Max.
1015
247
1900
334
85
63
53
Unit
Th
Th
Th
Tclk
Tclk
Tclk
MHz
Hz
kHz
*1) CLK signal input must be valid while power supply is applied.
*2) Display position is specific by the rise of DE signal only.
Horizontal display position is specified by the falling edge of 1st CLK right after the rise of DE, is
displayed on the left edge of the screen. Vertical display position is specified by the rise of DE after a “Low”
level period equivalent to eight times of horizontal period. The 1st data corresponding to one horizontal line
after the rise of DE is displayed at the top line of screen.
3.) If a period of DE “High” is less than 1366 CLK or less than 768 lines, the rest of the screen displays black.
4.) The display position does not fit to the screen if a period of DE “High” and the effective data period do not
synchronize with each other.
©Copyright AU Optronics, Inc.
April, 2007 All Rights Reserved.
No Reproduction and Redistribution Allowed
T216XW01 Ver0.0
11/25
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