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PDF CC133 Data sheet ( Hoja de datos )

Número de pieza CC133
Descripción 12 Channel Incremental Encoder Interface
Fabricantes Compcontrol 
Logotipo Compcontrol Logotipo



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No Preview Available ! CC133 Hoja de datos, Descripción, Manual

Technical Manual
CC133
12 Channel Incremental Encoder
Interface With Isolated Inputs
Version 1.2
February 1991

1 page




CC133 pdf
General Information
CC133
Compcontrol
Page 1-4
Technical Manual

5 Page





CC133 arduino
Functional Description
CC133
Several registers are implemented on the CC133 for generating and controlling of the interrupt capabil-
ity. Each channel has the following interrupt control/status registers:
Direct Input Register
Compare State Register (CSR)
State on IRQ Register (SOI)
IRQ Mask Register (IMR)
To detect a change in the input lines, the comparator must compare the ’Real Time’ input lines with a
copy of the previous state of the input lines. A copy is made of the current state of the input lines by
reading the ’Direct Input Register’, and this data should be written into the ’Compare State Register’. An
interrupt will be generated as soon as the ’Real Time’ input changes and the corresponding input is
enabled in the ’IRQ Mask Register’. The current states of the Index and Digital Input signals are saved
in the State On IRQ register at the time of the interrupt request. Each group has its own interrupt
request signal to the Bus Interrupter Module.
Further detailed programming considerations are given in chapter 5.
3.2.4 Group Operation Modes
The CF32006 encoder circuit can work in eight different modes. The mode of operation is programmed
into the encoder circuit by writing the mode number to the Mode Register of the specific Group.
Note: Different modes cannot be used inside one Group.
3.2.5 Mode Description
There are eight different modes of operation on a CF32006 encoder circuit: one counter mode, five
direction discriminator modes, one mode to measure a pulse width, and one mode to measure the fre-
quency of a signal.
3.2.5.1 Counter Mode, 0
Using the cascaded configuration (32 bit counter), the Most Significant Counter (MSC) must operate in
the counter mode. With this mode, the MSC reacts only on the up and/or down pulse from the Least
Significant Counter (LSC). The MSC device is hardwired to this mode.
Note: The LSC should not be asserted in the counter mode, since this will not result in any reaction
when Quadrature signal levels are changed.
3.2.5.2 Direction Discriminator Modes, 1-5
A channel’s Quadrature signals Ua1 and Ua2, identify forward or backward directions. If Ua1 leads
Ua2, the forward direction is indicated and the counter will count up; if Ua1 lags Ua2, the reverse direc-
tion is indicated and the counter will count down.
Compcontrol
Page 3-4
Technical Manual

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