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PDF UC2834 Data sheet ( Hoja de datos )

Número de pieza UC2834
Descripción High Efficiency Linear Regulator
Fabricantes Unitrode 
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High Efficiency Linear Regulator
UC1834
UC2834
UC3834
FEATURES
Minimum VIN - VOUT Less Than
0.5V At 5A Load With External
Pass Device
Equally Usable For Either Positive
or Negative Regulator Design
Adjustable Low Threshold Current
Sense Amplifier
Under And Over-Voltage Fault Alert
With Programmable Delay
Over-Voltage Fault Latch With
100mA Crowbar Drive Output
DESCRIPTION
The UC1834 family of integrated circuits is optimized for the design of low
input-output differential linear regulators. A high gain amplifier and 200mA
sink or source drive outputs facilitate high output current designs which use
an external pass device. With both positive and negative precision refer-
ences, either polarity of regulator can be implemented. A current sense am-
plifier with a low, adjustable, threshold can be used to sense and limit
currents in either the positive or negative supply lines.
In addition, this series of parts has a fault monitoring circuit which senses
both under and over-voltage fault conditions. After a user defined delay for
transient rejection, this circuitry provides a fault alert output for either fault
condition. In the over-voltage case, a 100mA crowbar output is activated.
An over-voltage latch will maintain the crowbar output and can be used to
shutdown the driver outputs. System control to the device can be accom-
modated at a single input which will act as both a supply reset and remote
shutdown terminal. These die are protected against excessive power dissi-
pation by an internal thermal shutdown function.
BLOCK DIAGRAM
6/94

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UC2834 pdf
APPLICATION INFORMATION
Foldback Current Limiting
UC1834
UC2834
UC3834
Both the current sense and error amplifiers on the UC1834
are transconductance type amplifiers. As a result, their volt-
age gain is a direct function of the load impedance at their
shared output pin, Pin 14. Their small signal voltage gain as
a function of load and frequency is nominally given by;
AV E A
=
ZL (f)
700
and
AV
C.
S. A
=
ZL (f)
70
for: f 500kHz and |ZL(f)| 1 M
Where:
AV=Small Signal Voltage Gain to pin 14.
ZL(f) = Load Impedance at Pin 14.
The UC1834 fault delay circuitry prevents the fault outputs
from responding to transient fault conditions. The delay reset
latch insures that the full, user defined, delay passes before an
over-voltage fault response occurs. This prevents unnecessary
crowbar, or latched-off conditions, from occurring following
sharp under-voltage to over-voltage transients.
The crowbar output on the UC1834 is activated following a
sustained over-voltage condition. The crowbar output remains
high as long as the fault condition persists, or, as long as the
over-voltage latch is set. The latch is set with an over-voltage
fault if the voltage at Pin 15 is above the latch reset threshold,
typically 0.4V. When the latch is set, its Qoutput will pull Pin
15 low through a series diode. As long as a nominal pull-up
load exists, the series diode prevents Qfrom pulling Pin 15
below the reset threshold. However, Pin 15 is pulled low
enough to disable the driver outputs if Pins 15 and 14 are
tied together. With Pin 15 and 14 common, the regulator
will latch off in response to an over-voltage fault. If the
fault condition is cleared and Pins 14 and 15 are momen-
tarily pulled below the latch reset threshold, the driver out-
puts are re-enabled.
Setting the Threshold Adjust Voltage (VADJ)
5

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