PDF SAMA5D36 Data sheet ( Hoja de datos )

Número de pieza	SAMA5D36
Descripción	ARM-based Embedded MPU
Fabricantes	ATMEL Corporation
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No Preview Available ! ARM-based Embedded MPU SAMA5D3 Series DATASHEET Description The Atmel SAMA5D3 series is a high-performance, power-efficient embedded MPU based on the ARM® Cortex®-A5 processor, achieving 536 MHz with power consumption levels below 0.5 mW in low-power mode. The device features a floating point unit for high-precision computing and accelerated data processing, and a high data bandwidth architecture. It integrates advanced user interface and connectivity peripherals and security features. The SAMA5D3 series features an internal multi-layer bus architecture associated with 39 DMA channels to sustain the high bandwidth required by the processor and the high-speed peripherals. The device offers support for DDR2/LPDDR/LPDDR2 and MLC NAND Flash memory with 24-bit ECC. The comprehensive peripheral set includes an LCD controller with overlays for hardware-accelerated image composition, a touchscreen interface and a CMOS sensor interface. Connectivity peripherals include Gigabit EMAC with IEEE1588, 10/100 EMAC, multiple CAN, UART, SPI and I2C. With its secure boot mechanism, hardware accelerated engines for encryption (AES, TDES) and hash function (SHA), the SAMA5D3 ensures anti-cloning, code protection and secure external data transfers. The SAMA5D3 series is optimized for control panel/HMI applications and applications that require high levels of connectivity in the industrial and consumer markets. Its low- power consumption levels make the SAMA5D3 particularly suited for battery-powered devices. There are five SAMA5D3 devices in this series. Table 1-1 “SAMA5D3 Device Differences” shows the differences in the embedded features. All other features are available on all derivatives; this includes the three USB ports as well as the encryption engine and secure boot features. 11121D–ATARM–03-Apr-14 1 page 3. Signal Description Table 3-1 gives details on the signal names classified by peripheral. Table 3-1. Signal Description List Signal Name Function Clocks, Oscillators and PLLs XIN Main Oscillator Input XOUT Main Oscillator Output XIN32 Slow Clock Oscillator Input XOUT32 Slow Clock Oscillator Output VBG Bias Voltage Reference for USB PCK0–PCK2 Programmable Clock Output Shutdown, Wake-up Logic SHDN Shut-Down Control WKUP Wake-Up Input ICE and JTAG TCK/SWCLK Test Clock/Serial Wire Clock TDI Test Data In TDO Test Data Out TMS/SWDIO Test Mode Select/Serial Wire Input/Output JTAGSEL JTAG Selection Reset/Test NRST Microcontroller Reset TST Test Mode Select NTRST Test Reset Signal BMS Boot Mode Select Debug Unit - DBGU DRXD Debug Receive Data DTXD Debug Transmit Data Advanced Interrupt Controller - AIC IRQ External Interrupt Input FIQ Fast Interrupt Input PIO Controller - PIOA - PIOB - PIOC - PIOD - PIOE PA0–PAxx Parallel IO Controller A PB0–PBxx Parallel IO Controller B PC0–PCxx Parallel IO Controller C PD0–PDxx Parallel IO Controller D PE0–PExx Parallel IO Controller E External Bus Interface - EBI Type Active Level Input Output Input Output Analog Output — — — — — — Output Input — — Input Input Output I/O Input — — — — — I/O Input Input Input Low — — — Input Output — — Input Input — — I/O — I/O — I/O — I/O — I/O — SAMA5D3 Series [DATASHEET] 11121D–ATARM–03-Apr-14 5 5 Page 4.2 324-ball LFBGA Package Pinout Table 4-1. SAMA5D3 Pinout for 324-ball LFBGA Package Primary Alternate Pin Power Rail I/O Type E3 VDDIOP0 GPIO F5 VDDIOP0 GPIO D2 VDDIOP0 GPIO F4 VDDIOP0 GPIO D1 VDDIOP0 GPIO J10 VDDIOP0 GPIO G4 VDDIOP0 GPIO J9 VDDIOP0 GPIO F3 VDDIOP0 GPIO J8 VDDIOP0 GPIO E2 VDDIOP0 GPIO K8 VDDIOP0 GPIO F2 VDDIOP0 GPIO G6 VDDIOP0 GPIO E1 VDDIOP0 GPIO H5 VDDIOP0 GPIO H3 VDDIOP0 GPIO H6 VDDIOP0 GPIO H4 VDDIOP0 GPIO H7 VDDIOP0 GPIO H2 VDDIOP0 GPIO J6 VDDIOP0 GPIO G2 VDDIOP0 GPIO J5 VDDIOP0 GPIO F1 VDDIOP0 GPIO J4 VDDIOP0 GPIO G3 VDDIOP0 GPIO J3 VDDIOP0 GPIO G1 VDDIOP0 GPIO_CLK2 K4 VDDIOP0 GPIO H1 VDDIOP0 GPIO K3 VDDIOP0 GPIO T2 VDDIOP1 GMAC N7 VDDIOP1 GMAC T3 VDDIOP1 GMAC N6 VDDIOP1 GMAC P5 VDDIOP1 GMAC T4 VDDIOP1 GMAC R4 VDDIOP1 GMAC U1 VDDIOP1 GMAC R5 VDDIOP1 GMAC P3 VDDIOP1 GMAC Signal PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 Dir Signal Dir I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — I/O — — PIO Peripheral A Signal LCDDAT0 LCDDAT1 LCDDAT2 LCDDAT3 LCDDAT4 LCDDAT5 LCDDAT6 LCDDAT7 LCDDAT8 LCDDAT9 LCDDAT10 LCDDAT11 LCDDAT12 LCDDAT13 LCDDAT14 LCDDAT15 LCDDAT16 LCDDAT17 LCDDAT18 LCDDAT19 LCDDAT20 LCDDAT21 LCDDAT22 LCDDAT23 LCDPWM LCDDISP LCDVSYNC LCDHSYNC LCDPCK LCDDEN TWD0 TWCK0 GTX0 GTX1 GTX2 GTX3 GRX0 GRX1 GRX2 GRX3 GTXCK GTXEN Dir O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O I/O O O O O O I I I I I O PIO Peripheral B PIO Peripheral C Reset State Signal Signal, Dir, PU, PD, HiZ, Dir Signal Dir ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — ISI_D0 I PIO, I, PU, ST — — ISI_D1 I PIO, I, PU, ST TWD2 I/O ISI_D2 I PIO, I, PU, ST TWCK2 O ISI_D3 I PIO, I, PU, ST PWMH0 O ISI_D4 I PIO, I, PU, ST PWML0 O ISI_D5 I PIO, I, PU, ST PWMH1 O ISI_D6 I PIO, I, PU, ST PWML1 O ISI_D7 I PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST — — — — PIO, I, PU, ST URXD1 I ISI_VSYNC I PIO, I, PU, ST UTXD1 O ISI_HSYNC I PIO, I, PU, ST PWMH0 O — — PIO, I, PU, ST PWML0 O — — PIO, I, PU, ST TK1 I/O — — PIO, I, PU, ST TF1 I/O — — PIO, I, PU, ST PWMH1 O — — PIO, I, PU, ST PWML1 O — — PIO, I, PU, ST TD1 O — — PIO, I, PU, ST RK1 I — — PIO, I, PU, ST PWMH2 O — — PIO, I, PU, ST PWML2 O — — PIO, I, PU, ST SAMA5D3 Series [DATASHEET] 11121D–ATARM–03-Apr-14 11 11 Page

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