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PDF HCPL-2200 Data sheet ( Hoja de datos )
| Número de pieza | HCPL-2200 | |
| Descripción | Very High CMR/ Wide VCC Logic Gate Optocouplers | |
| Fabricantes | Agilent(Hewlett-Packard) | |
| Logotipo | .gif "Agilent(Hewlett-Packard)"){kind=logo} |
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H
Low Input Current Logic Gate
Optocouplers
Technical Data
HCPL-2200
HCPL-2219
Features
• 2.5 kV/µs Minimum Common
Mode Rejection (CMR) at
VCM = 400 V (HCPL-2219)
• Compatible with LSTTL,
TTL, and CMOS Logic
• Wide VCC Range (4.5 to 20 V)
• 2.5 Mbd Guaranteed over
Temperature
• Low Input Current (1.6 mA)
• Three State Output (No
Pullup Resistor Required)
• Guaranteed Performance
from 0°C to 85°C
• Hysteresis
• Safety Approval
UL Recognized -2500 V rms
for 1 minute
CSA Approved
VDE 0884 Approved with
VIORM = 630 V peak
(HCPL-2219 Option 060
Only)
• MIL-STD-1772 Version
Available (HCPL-5200/1)
Applications
• Isolation of High Speed
Logic Systems
• Computer-Peripheral
Interfaces
• Microprocessor System
Interfaces
• Ground Loop Elimination
• Pulse Transformer
Replacement
• Isolated Buss Driver
• High Speed Line Receiver
Description
The HCPL-2200/2219 are
optically coupled logic gates that
combine a GaAsP LED and an
integrated high gain photo
detector. The detector has a three
state output stage and has a
Functional Diagram
NC 1
ANODE 2
CATHODE 3
NC 4
SHIELD
8 VCC
7 VO
6 VE
5 GND
detector threshold with hysteresis.
The three state output eliminates
the need for a pullup resistor and
allows for direct drive of data
busses. The hysteresis provides
differential mode noise immunity
and eliminates the potential for
output signal chatter.
A superior internal shield on the
HCPL-2219 guarantees common
mode transient immunity of
2.5 kV/µs at a common mode
voltage of 400 volts.
TRUTH TABLE
(POSITIVE LOGIC)
LED ENABLE OUTPUT
ON
OFF
ON
OFF
H
H
L
L
Z
Z
H
L
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this
component to prevent damage and/or degradation which may be induced by ESD.
1-120
5965-3596E
1 page  
VDE 0884 Insulation Related Characteristics (HCPL-2219 OPTION 060 ONLY)
Description
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms
for rated mains voltage ≤ 450 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test,
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 12, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
Insulation Resistance at TS, VIO = 500 V
Symbol
VIORM
VPR
VPR
VIOTM
TS
IS,INPUT
PS,OUTPUT
RS
Characteristic
I-IV
I-III
55/85/21
2
630
1181
945
6000
175
230
600
≥ 109
Units
V peak
V peak
V peak
V peak
°C
mA
mW
Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, (VDE 0884), for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in
application.
1-124
5 Page 
HCPL-2200
A1
VCC 8
B2
RIN
3
7
6
VFF 4
PULSE GENERATOR +
5
GND
VCM
–
VCC
OUTPUT VO
MONITORING
NODE
0.1 µF
BYPASS
VCM
0V
VOH
OUTPUT
VO
VOL
50 V
SWITCH AT A: IF = 1.6 mA
VO (MIN.)*
SWITCH AT B: IF = 0 mA
VO (MAX.)*
* SEE NOTE 6.
HCPL-2219 OPTION 060 ONLY
800
PS (mW)
700 IS (mA)
600
500
400
300
200
100
0
0 25 50 75 100 125 150 175 200
TS – CASE TEMPERATURE – °C
Figure 12. Thermal Derating Curve,
Dependence of Safety Limiting Value
with Case Temperature per
VDE 0884.
Figure 11. Test Circuit for Common Mode Transient Immunity and Typical
Waveforms.
VCC1
(+5 V)
120 pF
1.1
kΩ 1
DATA
INPUT
TOTEM
POLE
OUTPUT
GATE
TTL OR
LSTTL
1
2
3
4
HCPL-2200
VCC 8
7
6
GND 5
2
VCC2
(+5 V)
DATA
OUTPUT
UP TO 16
LSTTL
LOADS
OR 4 TTL
LOADS
VCC1
(+5 V)
120 pF (OPTIONAL*)
VCC2
(4.5 TO 20 V)
1.1
kΩ
DATA
INPUT
TOTEM
POLE
OUTPUT
GATE
TTL OR
LSTTL
1
HCPL-2200
1 VCC 8
27
36
4 GND 5
RL
CMOS
VCC2
5V
10 V
15 V
20 V
RL
1.1 K
2.37 K
3.83 K
5.11 K
2
DATA
OUTPUT
Figure 13. Recommended LSTTL to LSTTL Circuit.
Figure 14. LSTTL to CMOS Interface Circuit.
VCC1 (+5 V)
DATA
INPUT
TTL OR
LSTTL
HCPL-2200
1.1 kΩ
1
VCC 8
2
D1
3
4
7
6
GND 5
D1 (1N4150) REQUIRED FOR
ACTIVE PULL-UP DRIVER.
Figure 15. Recommended LED Drive Circuit.
VCC (+5 V)
120 pF (OPTIONAL*)
1.1
kΩ
HCPL-2200
1 VCC 8
DATA
INPUT
OPEN
COLLECTOR
GATE
4.7 kΩ
TTL OR
LSTTL
2
3
4
7
6
GND 5
Figure 16. Series LED Drive with Open Collector Gate
(4.7 kΩ Resistor Shunts IOH from the LED).
*The 120 pF capacitor may be omitted in applications where 500 ns propagation delay is sufficient.
1-130
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HCPL-2200.PDF ] | |
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