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PDF AT45DB161E-SSHF-B Data sheet ( Hoja de datos )

Número de pieza AT45DB161E-SSHF-B
Descripción 2.3V or 2.5V Minimum SPI Serial Flash Memory
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Atmel AT45DB161E
16-Mbits DataFlash (with Extra 512-Kbits), 2.3V or 2.5V Minimum
SPI Serial Flash Memory
Features
PRELIMINARY DATASHEET
Single 2.3V - 3.6V or 2.5V - 3.6V supply
Serial Peripheral Interface (SPI) compatible
Supports SPI modes 0 and 3
Supports Atmel® RapidSoperation
Continuous Read capability through entire array
Up to 85MHz
Low-power Read option up to 10MHz
Clock-to-output time (tV) of 6ns maximum
User configurable page size
512 bytes per page
528 bytes per page (default)
Page size can be factory pre-configured for 512 bytes
Two fully independent SRAM data buffers (512/528 bytes)
Allows receiving data while reprogramming the Main Memory Array
Flexible programming options
Byte/Page program (1 to 512/528 bytes) directly into main memory
Buffer Write
Buffer to Main Memory Page Program
Flexible Erase options
Page Erase (512/528 bytes)
Block Erase (4KB)
Sector Erase (128KB)
Chip Erase (16-Mbits)
Program and Erase Suspend/Resume
Advanced hardware and software data protection features
Individual sector protection
Individual sector lockdown to make any sector permanently read-only
128-byte, One-Time Programmable (OTP) Security Register
64 bytes factory programmed with a unique identifier
64 bytes user programmable
Software controlled reset
JEDEC Standard Manufacturer and Device ID Read
Low-power dissipation
500nA Ultra-Deep Power-Down current (typical)
3μA Deep Power-Down current (typical)
25μA Standby current (typical)
11mA Active Read current (typical)
Endurance: 100,000 program/erase cycles per page minimum
Data retention: 20 years
Complies with full industrial temperature range
Green (Pb/Halide-free/RoHS compliant) packaging options
8-lead SOIC (0.150" wide)
8-pad Ultra-thin DFN (5 x 6 x 0.6mm)
9-ball Chip-scale BGA (5 x 5 x 1.2mm)
8782A–DFLASH–3/12

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AT45DB161E-SSHF-B pdf
3. Memory Array
To provide optimal flexibility, the AT45DB161E memory array is divided into three levels of granularity comprising of
sectors, blocks, and pages. Figure 3-1, Memory Architecture Diagram illustrates the breakdown of each level and details
the number of pages per sector and block. All program operations to the DataFlash occur on a page by page basis. The
erase operations can be performed at the chip, sector, block, or page level.
Figure 3-1. Memory Architecture Diagram
Sector Architecture
Sector 0a = 8 pages
4,096/4,224 bytes
Sector 0a
Sector 0b = 248 pages
126,976/130,944 bytes
Sector 1 = 256 pages
131,072 /135,168 bytes
Sector 2 = 256 pages
131,072/135,168 bytes
Sector 14 = 256 pages
131,072/135,168 bytes
Block Architecture
Block 0
Block 1
Block 2
Block 30
Block 31
Block 32
Block 33
Block 62
Block 63
Block 64
Block 65
8 Pages
Page Architecture
Page 0
Page 1
Page 6
Page 7
Page 8
Page 9
Page 14
Page 15
Page 16
Page 17
Page 18
Sector 15 = 256 pages
131,072/135,168 bytes
Block 510
Block 511
Block = 4,096/4,224 bytes
Page 4,094
Page 4,095
Page = 512/528 bytes
Atmel AT45DB161E [PRELIMINARY DATASHEET]
8782A–DFLASH–3/12
5

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AT45DB161E-SSHF-B arduino
6.4 Main Memory Page Program through Buffer with Built in Erase
This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program with Built-In Erase
operations. Data is first clocked into Buffer 1 or Buffer 2 from the input pin (SI) and then programmed into a specified
page in the main memory.
To perform a Main Memory Page Program through Buffer using the standard DataFlash page size (528 bytes), an
opcode 82h for Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bits comprised
of two dummy bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be written, and 10
buffer address bits (BFA9 - BFA0) that select the first byte in the buffer to be written.
To perform a Main Memory Page Program through Buffer using the binary page size (512 bytes), an opcode 82h for
Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bytes comprised of three
dummy bits, 12 page address bits (A20 - A9) that specify the page in the main memory to be written, and nine buffer
address bits (BFA8 - BFA0) that selects the first byte in the buffer to be written.
After all address bytes are clocked in, the part will take data from the input pin (SI) and store it in the specified data buffer.
If the end of the buffer is reached, the device will wrap around back to the beginning of the buffer. When there is a
low-to-high transition on the CS pin, the device will first erase the selected page in main memory (the erased state is a
Logic 1) and then program the data stored in the buffer into that main memory page. Both the erasing and the
programming of the page are internally self-timed and should take place in a maximum time of tEP. During this time, the
RDY/BUSY bit in the Status Register will indicate that the device is busy.
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to erase or
program properly. If an erase programming error arises, it will be indicated by the EPE bit in the Status Register.
6.5 Main Memory Byte/Page Program through Buffer 1 without Built-In Erase
This operation is a combination of the Buffer Write and Buffer to Main Memory Program without Built-In Erase operations
to allow any number of bytes (1 to 512/528 bytes) to be programmed directly into previously erased locations in the main
memory. Data is first clocked into Buffer 1 from the input pin (SI) and then programmed into specified byte locations in
the main memory. Multiple bytes up to the page size can be entered with one command sequence.
To perform a Main Memory Byte/Page Program through Buffer 1 using the standard DataFlash page size (528 bytes), an
opcode 02h must first be clocked into the device followed by three address bytes comprised of two dummy bits,
12 page address bits (PA11 - PA0) that specify the page in the main memory to be written, and 10 buffer address bits
(BFA9 - BFA0) that select the first byte in the buffer to be written. After all address bytes are clocked in, the device will
take data from the input pin (SI) and store it in Buffer 1. Any number of bytes (1 to 528) can be entered. If the end of the
buffer is reached, then the device will wrap around back to the beginning of the buffer.
To perform a Main Memory Byte/Page Program through Buffer 1 using the binary page size (512 bytes), an opcode 02h
for Buffer 1 using must first be clocked into the device followed by three address bytes comprised of three dummy bits,
12 page address bits (A20 - A9) that specify the page in the main memory to be written, and nine buffer address bits
(BFA8 - BFA0) that selects the first byte in the buffer to be written. After all address bytes are clocked in, the device will
take data from the input pin (SI) and store it in Buffer 1. Any number of bytes (1 to 512) can be entered. If the end of the
buffer is reached, then the device will wrap around back to the beginning of the buffer. When using the binary page size,
the page and buffer address bits correspond to a 21-bit logical address (A20-A0) in the main memory.
After data bytes have been clocked into the device, a low-to-high transition on the CS pin will start the program operation
in which the device will program the data stored in Buffer 1 into the Main Memory Array. Only the data bytes that were
clocked into the device will be programmed into the main memory.
Example: If only two data bytes were clocked into the device, then only two bytes will be programmed into main
memory and the remaining bytes in the Main Memory Page will remain in their previous state.
Atmel AT45DB161E [PRELIMINARY DATASHEET]
8782A–DFLASH–3/12
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