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PDF HCPL-0700 Data sheet ( Hoja de datos )
| Número de pieza | HCPL-0700 | |
| Descripción | LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington
photodetector housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
FEATURES
• Low current - 0.5 mA
• Superior CTR-2000%
• Superior CMR-10 kV/µs
• CTR guaranteed 0-70°C
• *BSI, CSA and UL approval
PACKAGE DIMENSIONS
0.164 (4.16)
0.144 (3.66)
APPLICATIONS
• Digital logic ground isolation
• Telephone ring detector
• EIA-RS-232C line receiver
• High common mode noise
line receiver
• µP bus isolation
• Current loop receiver
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7
V
B
6V
O
5 GND
HCPL-0700 / HCPL-0701
Pin 1
0.202 (5.13)
0.182 (4.63)
0.143 (3.63)
0.123 (3.13)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
NOTE
All dimensions are in inches (millimeters)
© 2003 Fairchild Semiconductor Corporation
Page 1 of 11
8/18/03
1 page  
HCPL-0700
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0701
ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified)
Current Limiting Resistor Calculations
R1(Non-Invert) = -V----D---D----1----–-----V---I-D-F---F----–-----V----O----L---1-
R1(Invert) = -V----D---D----1----–-----V---I-O-F---H----1----–----V-----D---F--
R2 = V-----D---D----2------=-------V----O--I--LL---X---(---@------I--L----–-----I-2----)
Where:
VDD1 - Input Supply Voltage
VDD2 - Output Supply Voltage
VDF - Diode Forward Voltage
VOL1 - Logic “0” Voltage of Driver
VOH1 - Logic “1” Voltage of Driver
IF - Diode Forward Current
VOLX - Saturation Voltage of
Output Transistor
IL - Load Current Through
Resistor R2
I2 - Input Current of Output
Gate
INPUT
OUTPUT
CMOS CMOS
@ 5V @ 10V
74XX
74LXX 74SXX 74LSXX 74HXX
CMOS
@5V
CMOS
@ 10 V
74XX
74LXX
74SXX
74LSXX
74HXX
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
INV.
R1 (Ω)
2000
510
5100
4700
2200
180
1800
100
2000
360
2000
180
2000
180
R2 (Ω)
1000
R2 (Ω)
2200
R2 (Ω)
750
R2 (Ω)
1000
R2 (Ω)
1000
R2 (Ω) R2 (Ω)
1000 560
Fig. 1 Resistor Values for Logic Interface
VDD1
VDD2
VDD2
1
2
3
IN R1
4
8
7 R2
6
5
1
IN 2
OUT
3
R1
4
8
7 R2
6
5
OUT
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
© 2003 Fairchild Semiconductor Corporation
Page 5 of 11
8/18/03
5 Page 
HCPL-0700
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0701
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
© 2003 Fairchild Semiconductor Corporation
Page 11 of 11
8/18/03
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HCPL-0700.PDF ] | |
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