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Número de pieza BD9873CP-V5
Descripción Simple Step-down Switching Regulators
Fabricantes ROHM Semiconductor 
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Single-chip Type with Built-in FET Switching Regulator Series
Simple Step-down
Switching Regulators
with Built-in Power MOSFET
BD9873CP-V5,BD9874CP-V5
No.09027EBT39
Description
The BD9873,74CP-V5 single-channel step-down switching regulator incorporates a Pch MOSFET capable,
as well as circuitry that eliminates the need for external compensation – only a diode, coil, and ceramic capacitor are required –
reducing board size significantly.
Features
1) Maximum switching current : 1.5A, 3.0A
2) Built-in Pch FET ensures high efficiency
3) Output voltage adjustable via external resistors
4) High switching frequency : 110kHz (fixed)
5) Soft start time : 4ms (fixed)
6) Over current and thermal shutdown protection circuits built in
7) ON/OFF control via STBY pin
Applications
TVs, printers, DVD players, projectors, gaming devices, PCs, car audio/navigation systems, ETCs, communication equipment, AV
products, office equipment, industrial devices, and more.
Absolute Maximum RatingsTa25
Parameter
Symbol
Supply VoltageVCC-GND
Vcc
STBY-GND
OUT-GND
INV-GND
VSTBY
VOUT
VINV
Maximum Switching Current
Iout
Power Dissipation
Pd
Operating Temperature
Topr
Storage Temperature
Tstg
(*1) Do not exceed Pd, ASO.
(*2) Derated at 16mW/over Ta=25
Ratings
36
36
36
5
1.5(*1) BD9873
3.0(*1) BD9874
2000(*2)
-40+85
-55+150
Unit
V
V
V
V
A
A
mW
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
1/12
2012.09 - Rev.B

1 page




BD9873CP-V5 pdf
BD9873CP-V5,BD9874CP-V5
Reference data BD9873CP-V5
100
90
80
70
60
50
40
30
20
10
0
0
Ta=25
VCC=12V
VCC=36V
VCC=8V
0.5 1
IOUT [A]
1.5
Fig.4
Efficiency-Load Current
5.15
VCC=12V
5.1
5.05
5
Ta=25
Ta=85
4.95
4.9
Ta=-40
4.85
0
0.5 1
IOUT [A]
1.5
Fig.7
Output voltage- Load Current
3
VCC=12V
2.5
2
Ta=150
1.5
Ta=25
1
0.5 Ta=-40
0
0.0 0.5 1.0 1.5
IO[A]
Fig10
V(VCC-OUT)-Iout
5msec / div
VOUT
500mV / div
Fig.13
Load Response
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
Technical Note
6
VCC=12V
5
4
3 Ta=85
2 Ta=-40
1 Ta=25
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
Ipinvo [A]
Fig.5
Over Current Protection
8
OUT=5V
7
6
5
4 Ta=25
3
2 Ta=85
Ta=-40
1
0
0 5 10 15 20 25 30 35
VCC [V]
Fig.8
Output voltage-Supply voltage
200
150
100
Ta=25
50
OUT=5V
Ta=85
Ta=-40
0
5 10 15 20 25 30 35
VCC [V]
Fig.11
Switching Frequency - Supply
lt
5msec / div
STBY
5V / div
VOUT
2V / div
Fig.14
Start-up waveform
5/12
200
180
160
140
120
100
80
60
40
20
0
-40 -20 0 20 40 60 80 100
Ta [℃]
Fig.6
Switching Frequency-Temperature
10
9
8
7
6
5
4
3
2
1
0
5
STB=3V
Ta=85
Ta=25
Ta=-40
10 15 20 25 30 35
VCC [V]
Fig.9
Circuit current-Supply voltage
Iout=No Load
1.1
1.08 VCC=12V
1.06
1.04
1.02
1
0.98
0.96
0.94
0.92
0.9
-40 -20
0
20 40 60 80 100
Ta [℃]
Fig.12
INV Pin Threshold voltage-
Temperature
10
8
6
4
2
0
-40 -20 0 20 40 60 80 100
Ta [℃]
Fig.15
ICC(STB)-Ta
2012.09 - Rev.B

5 Page





BD9873CP-V5 arduino
BD9873CP-V5,BD9874CP-V5
Technical Note
●Operation Notes
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC
deterioration or damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where
the absolute maximum ratings may be exceeded is anticipated.
2) GND potential
Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry
a voltage lower than or equal to the GND pin, including during actual transient phenomena.
3) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pin caused by the
presence of a foreign object may result in damage to the IC.
5) Operation in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6) Thermal shutdown circuit (TSD circuit)
This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to
prevent runaway thermal operation. Do not continue to use the IC after operating this circuit or use the IC in an environment
where the operation of the thermal shutdown circuit is assumed.
7) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and
use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process.
8) Common impedance
Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as
possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance).
9) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits.
For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged.
It is recommended to insert a diode for preventing back current flow in series with VCC or bypass diodes between VCC and
each pin.
10) IC pin input
This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic
elements. For example, when a resistor and transistor are connected to pins as shown in following chart,
the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the
transistor (NPN).
Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of
other adjacent elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's
architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage.
For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements,
such as by the application of voltages lower than the GND (PCB) voltage to input and output pins.
Bypass diode
Back current prevention diode
VCC
Output Pin
Resistance
( PinA )
Transistor
( PinB )
( PinA )
Parasitic diode
P substrate
Parasitic diode GND
Fig.29
P substrate
Parasitic diode
GND
GND
GND
( Pin B )
BC
GND
Other adjacent components
Parasitic diode
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
11/12
2012.09 - Rev.B

11 Page







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