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PDF 45DB161E Data sheet ( Hoja de datos )
| Número de pieza | 45DB161E | |
| Descripción | AT45DB161E | |
| Fabricantes | Adesto | |
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AT45DB161E
16-Mbit DataFlash (with Extra 512-Kbits), 2.3V or 2.5V Minimum
SPI Serial Flash Memory
Features
DATASHEET
Single 2.3V - 3.6V or 2.5V - 3.6V supply
Serial Peripheral Interface (SPI) compatible
Supports SPI modes 0 and 3
Supports RapidS™ operation
Continuous read capability through entire array
Up to 85MHz
Low-power read option up to 15MHz
Clock-to-output time (tV) of 6ns maximum
User configurable page size
512 bytes per page
528 bytes per page (default)
Page size can be factory pre-configured for 512 bytes
Two fully independent SRAM data buffers (512/528 bytes)
Allows receiving data while reprogramming the main memory array
Flexible programming options
Byte/Page Program (1 to 512/528 bytes) directly into main memory
Buffer Write
Buffer to Main Memory Page Program
Flexible erase options
Page Erase (512/528 bytes)
Block Erase (4KB)
Sector Erase (128KB)
Chip Erase (16-Mbits)
Program and Erase Suspend/Resume
Advanced hardware and software data protection features
Individual sector protection
Individual sector lockdown to make any sector permanently read-only
128-byte, One-Time Programmable (OTP) Security Register
64 bytes factory programmed with a unique identifier
64 bytes user programmable
Hardware and software controlled reset options
JEDEC Standard Manufacturer and Device ID Read
Low-power dissipation
400nA Ultra-Deep Power-Down current (typical)
3μA Deep Power-Down current (typical)
25μA Standby current (typical at 20MHz)
11mA Active Read current (typical)
Endurance: 100,000 program/erase cycles per page minimum
Data retention: 20 years
Complies with full industrial temperature range
Green (Pb/Halide-free/RoHS compliant) packaging options
8-lead SOIC (0.150" wide and 0.208" wide)
8-pad Ultra-thin DFN (5 x 6 x 0.6mm)
9-ball Ultra-thin UBGA (6 x 6 x 0.6mm)
8782G–DFLASH–10/2013
1 page  
3. Memory Array
To provide optimal flexibility, the AT45DB161E memory array is divided into three levels of granularity comprising of
sectors, blocks, and pages. Figure 3-1, Memory Architecture Diagram illustrates the breakdown of each level and details
the number of pages per sector and block. Program operations to the DataFlash can be done at the full page level or at
the byte level (a variable number of bytes). The erase operations can be performed at the chip, sector, block, or page
level.
Figure 3-1. Memory Architecture Diagram
Sector Architecture
Sector 0a = 8 pages
4,096/4,224 bytes
Sector 0a
Sector 0b = 248 pages
126,976/130,944 bytes
Sector 1 = 256 pages
131,072 /135,168 bytes
Sector 2 = 256 pages
131,072/135,168 bytes
Sector 14 = 256 pages
131,072/135,168 bytes
Block Architecture
Block 0
Block 1
Block 2
Block 30
Block 31
Block 32
Block 33
Block 62
Block 63
Block 64
Block 65
8 Pages
Page Architecture
Page 0
Page 1
Page 6
Page 7
Page 8
Page 9
Page 14
Page 15
Page 16
Page 17
Page 18
Sector 15 = 256 pages
131,072/135,168 bytes
Block 510
Block 511
Block = 4,096/4,224 bytes
Page 4,094
Page 4,095
Page = 512/528 bytes
AT45DB161E
8782G–DFLASH–10/2013
5
5 Page 
When a low-to-high transition occurs on the CS pin, the device will program the data stored in the appropriate buffer into
the specified page in the main memory. The page in main memory that is being programmed must have been previously
erased using one of the erase commands (Page Erase, Block Erase, Sector Erase, or Chip Erase). The programming of
the page is internally self-timed and should take place in a maximum time of tP. During this time, the RDY/BUSY bit in the
Status Register will indicate that the device is busy.
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program
properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.
6.4 Main Memory Page Program through Buffer with Built-In Erase
The Main Memory Page Program through Buffer with Built-In Erase command combines the Buffer Write and Buffer to
Main Memory Page Program with Built-In Erase operations into a single operation to help simplify application firmware
development. With the Main Memory Page Program through Buffer with Built-In Erase command, data is first clocked
into either Buffer 1 or Buffer 2, the addressed page in memory is then automatically erased, and then the contents of the
appropriate buffer are programmed into the just-erased main memory page.
To perform a Main Memory Page Program through Buffer using the standard DataFlash page size (528 bytes), an
opcode of 82h for Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bytes
comprised of two dummy bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be written,
and 10 buffer address bits (BFA9 - BFA0) that select the first byte in the buffer to be written.
To perform a Main Memory Page Program through Buffer using the binary page size (512 bytes), an opcode of 82h for
Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bytes comprised of three
dummy bits, 12 page address bits (A20 - A9) that specify the page in the main memory to be written, and nine buffer
address bits (BFA8 - BFA0) that select the first byte in the buffer to be written.
After all address bytes have been clocked in, the device will take data from the input pin (SI) and store it in the specified
data buffer. If the end of the buffer is reached, the device will wrap around back to the beginning of the buffer. When
there is a low-to-high transition on the CS pin, the device will first erase the selected page in main memory (the erased
state is a Logic 1) and then program the data stored in the buffer into that main memory page. Both the erasing and the
programming of the page are internally self-timed and should take place in a maximum time of tEP. During this time, the
RDY/BUSY bit in the Status Register will indicate that the device is busy.
The device also incorporates an intelligent erase and programming algorithm that can detect when a byte location fails to
erase or program properly. If an erase or program error arises, it will be indicated by the EPE bit in the Status Register.
6.5 Main Memory Byte/Page Program through Buffer 1 without Built-In Erase
The Main Memory Byte/Page Program through Buffer 1 without Built-In Erase command combines both the Buffer Write
and Buffer to Main Memory Program without Built-In Erase operations to allow any number of bytes (1 to 512/528 bytes)
to be programmed directly into previously erased locations in the main memory array. With the Main Memory Byte/Page
Program through Buffer 1 without Built-In Erase command, data is first clocked into Buffer 1, and then only the bytes
clocked into the buffer are programmed into the pre-erased byte locations in main memory. Multiple bytes up to the page
size can be entered with one command sequence.
To perform a Main Memory Byte/Page Program through Buffer 1 using the standard DataFlash page size (528 bytes), an
opcode of 02h must first be clocked into the device followed by three address bytes comprised of two dummy bits,
12 page address bits (PA11 - PA0) that specify the page in the main memory to be written, and 10 buffer address bits
(BFA9 - BFA0) that select the first byte in the buffer to be written. After all address bytes are clocked in, the device will
take data from the input pin (SI) and store it in Buffer 1. Any number of bytes (1 to 528) can be entered. If the end of the
buffer is reached, then the device will wrap around back to the beginning of the buffer.
To perform a Main Memory Byte/Page Program through Buffer 1 using the binary page size (512 bytes), an opcode of
02h for Buffer 1 using must first be clocked into the device followed by three address bytes comprised of three dummy
bits, 12 page address bits (A20 - A9) that specify the page in the main memory to be written, and nine buffer address bits
(BFA8 - BFA0) that selects the first byte in the buffer to be written. After all address bytes are clocked in, the device will
take data from the input pin (SI) and store it in Buffer 1. Any number of bytes (1 to 512) can be entered. If the end of the
AT45DB161E
8782G–DFLASH–10/2013
11
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