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Número de pieza | C8051F972 | |
Descripción | Low Power Capacitive Sensing MCU | |
Fabricantes | Silicon Laboratories | |
Logotipo | ||
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No Preview Available ! C8051F97x
Low Power Capacitive Sensing MCU with up to 32 kB of Flash
Low Power Consumption
- 200 µA/MHz in active mode (24.5 MHz clock)
- 2 µs wakeup time
- 55 nA sleep mode with brownout detector
- 280 nA sleep mode with LFO
- 600 nA sleep mode with external crystal
Capacitance Sense Interface
- Supports buttons, sliders, wheels, and proximity sensing
- Fast 40 µs per channel conversion time
- 16-bit resolution, up to 43 input channels
- Auto scan and wake-on-touch
- Auto-accumulate up to 64x samples
10-Bit Analog-to-Digital Converter
- Up to 43 external pin input channels, up to 300 ksps
- Internal VREF or external VREF supported
Clock Sources
- Internal oscillators: 24.5 MHz, ±2% accuracy supports UART
operation; 20 MHz low power oscillator requires very little bias
current.
- External oscillator: Crystal, RC, C, or CMOS Clock
- SmaRTClock oscillator: 32 kHz Crystal or internal LFO
- Can switch between clock sources on-the-fly; useful in imple-
menting various power-saving modes
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-intrusive in-
system debug (no emulator required)
- Provides breakpoints, single stepping, inspect/modify memory
and registers
Unique Identifier
- 128-bit unique key for each device
High-Speed CIP-51 µC Core
- Efficient, pipelined instruction architecture
- Up to 25 MIPS throughput with 25 MHz clock
- Uses standard 8051 instruction set
- Expanded interrupt handler
- 1-cycle 16 x 16 MAC Engine
- 7-channel Direct Memory Access (DMA) module
Memory
- Up to 32 kB flash
- Flash is in-system programmable in 512-Byte sectors
- Up to 8 kB RAM
General-Purpose I/O
- Up to 43 pins with high sink current and programmable drive
- Crossbar-enabled
Timer/Counters and PWM
- 4 general purpose 16-bit timer/counters
- 16-bit Programmable Counter Array (PCA) with three channels
of PWM, capture/compare, or frequency output capability, and
watchdog timer
Supply Voltage: 1.8 to 3.6 V
- Built-in LDO regulator allows a high analog supply voltage and
low digital core voltage
- 2 supply monitors (brownout detector) for sleep and active
modes
Package Options
- 24-pin QFN (4x4 mm)
- 32-pin QFN (5x5 mm)
- 48-pin QFN (6x6 mm)
Temperature Ranges: –40 to +85 °C
Core / Memory / Support
16-32 kB Flash
4-8 kB RAM
CIP-51
(25 MHz)
Core LDO
Supply Monitor
16-bit CRC
7 ch. DMA 16 x 16 MAC
C2 Serial Debug / Programming
Digital Peripherals
UART
I2C / SMBus HS I2C Slave
SPI
4 x 16-bit Timers
3-Channel PCA / Watchdog
Clocking / Oscillators
24.5 MHz Precision Oscillator
20 MHz Low Power Oscillator
smaRTClock with 16.4 kHz LFO
External Oscillator
Analog Peripherals
SAR ADC (10-bit 300 ksps)
Capacitive Sensing
Voltage Reference
Temperature Sensor
Rev 1.0 5/14
Copyright © 2014 by Silicon Laboratories
C8051F97x
1 page C8051F97x
20. CIP-51 Microcontroller Core ........................................................................................... 165
20.1.Performance .............................................................................................................. 165
20.2.Programming and Debugging Support ...................................................................... 166
20.3.Instruction Set ............................................................................................................ 166
20.3.1.Instruction and CPU Timing............................................................................... 166
20.4.SFR Paging................................................................................................................171
20.5.CPU Core Registers .................................................................................................. 178
21. Direct Memory Access (DMA0)....................................................................................... 188
21.1.DMA0 Architecture..................................................................................................... 189
21.2.DMA0 Arbitration........................................................................................................ 189
21.2.1.DMA0 Memory Access Arbitration..................................................................... 189
21.2.2.DMA0 channel arbitration .................................................................................. 190
21.3.DMA0 Operation in Low Power Modes...................................................................... 190
21.4.Transfer Configuration ...............................................................................................190
21.5.DMA0 Registers......................................................................................................... 191
22. Multiply and Accumulate (MAC0) ................................................................................... 203
22.1.Special Function Registers ........................................................................................204
22.2.Integer and Fractional Math ....................................................................................... 204
22.3.Operating in Multiply and Accumulate Mode ............................................................. 205
22.4.Operating in Multiply Only Mode................................................................................ 205
22.5.MCU mode operation................................................................................................. 206
22.6.DMA mode operation ................................................................................................. 206
22.7. Accumulator 1-Bit Shift Operations........................................................................... 208
22.8.Multi-Bit Shift Accumulator Operation ........................................................................ 209
22.9.Accumulator Alignment (Right Byte Shift).................................................................. 210
22.10.Rounding and Saturation ......................................................................................... 210
22.11.Usage Examples......................................................................................................212
22.11.1.Multiply and Accumulate in Fractional Mode ................................................... 212
22.11.2.Multiply Only in Integer Mode ..........................................................................212
22.11.3.Initializing Memory Block Using DMA0 and MAC0.......................................... 213
22.12.MAC0 Registers....................................................................................................... 214
23. Cyclic Redundancy Check Unit (CRC0)......................................................................... 233
23.1.CRC Algorithm ........................................................................................................... 233
23.2.Preparing for a CRC Calculation................................................................................ 235
23.3.Performing a CRC Calculation................................................................................... 235
23.4.Accessing the CRC0 Result....................................................................................... 235
23.5.CRC0 Bit Reverse Feature ........................................................................................235
23.6.CRC Control Registers .............................................................................................. 236
24. Clocking Sources.............................................................................................................242
24.1.Programmable Precision Internal Oscillator............................................................... 243
24.2.Low Power Internal Oscillator .................................................................................... 243
24.3.External Oscillator Drive Circuit .................................................................................243
24.3.1.External Crystal Mode ....................................................................................... 243
24.3.2.External RC Mode ............................................................................................. 244
24.3.3.External Capacitor Mode ................................................................................... 246
24.3.4.External CMOS Clock Mode.............................................................................. 246
Rev 1.0
5
5 Page C8051F97x
Table 1.2. Global Electrical Characteristics (Continued)
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
Parameter
Conditions
Min Typ Max units
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from Flash)
IDD3, 4
VDD = 1.8–3.6 V,
Freq = 24.5 MHz (includes preci-
sion oscillator current)
—
5
6
mA
VDD = 1.8–3.6 V, Freq = 20 MHz — 4 — mA
(includes low power oscillator
current)
VDD = 1.8 V, Freq = 1 MHz
(includes external CMOS
oscillator / GPIO current)
— 420 —
µA
VDD = 3.6 V, Freq = 1 MHz
(includes external CMOS
oscillator / GPIO current)
— 440 —
µA
IDD Frequency Sensitivity1, 3,
VDD = 1.8–3.6 V,
Freq = 32.768 kHz
(includes RTC current)
— 95 — µA
VDD = 1.8-3.6 V, T = 25 °C, Freq — 230 — µA/MHz
< 14 MHz
(Flash oneshot active)
VDD = 1.8-3.6 V, T = 25 °C, Freq — 130 — µA/MHz
> 14 MHz
(Flash oneshot bypassed)
Notes:
1. Based on device characterization data; Not production tested.
2. SYSCLK must be at least 32 kHz to enable debugging.
3. The values in this table are obtained with the CPU executing an “sjmp $” loop, which is the compiled form of a while(1)
loop in C. See the power measurement code examples for more information.
4. Includes oscillator and regulator supply current.
Rev 1.0
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet C8051F972.PDF ] |
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