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PDF Am29LV200BT-80EE Data sheet ( Hoja de datos )

Número de pieza Am29LV200BT-80EE
Descripción 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
Fabricantes Advanced Micro Devices 
Logotipo Advanced Micro Devices Logotipo



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Am29LV200B
Data Sheet
The Am29LV200B is not offered for new designs. Please contact a Spansion representative for alter-
nates.
The following document contains information on Spansion memory products. Although the document
is marked with the name of the company that originally developed the specification, Spansion will
continue to offer these products to existing customers.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appro and
changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “Am” and “MBM”. To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 21521 Revision D Amendment 6 Issue Date October 10, 2006
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Am29LV200BT-80EE pdf
DATA SHEET
TABLE OF CONTENTS
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Special Handling Instructions ................................................... 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 1. Am29LV200B Device Bus Operations ................................ 9
Word/Byte Configuration .......................................................... 9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences .............................. 9
Program and Erase Operation Status .................................... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ................................................................10
RESET#: Hardware Reset Pin ...................................................10
Output Disable Mode .............................................................. 11
Table 2. Am29LV200BT Top Boot Block Sector Address Table..... 11
Table 3. Am29LV200BB Bottom Boot Block Sector Address Table 11
Autoselect Mode ..................................................................... 11
Table 4. Am29LV200B Autoselect Codes (High Voltage Method).. 12
Sector Protection/Unprotection ............................................... 12
Temporary Sector Unprotect .................................................. 12
Figure 1. In-System Sector Protect/Unprotect Algorithms ...............13
Figure 2. Temporary Sector Unprotect Operation ...........................14
Hardware Data Protection ...................................................... 14
Low VCC Write Inhibit .............................................................. 14
Write Pulse “Glitch” Protection ............................................... 14
Logical Inhibit .......................................................................... 14
Power-Up Write Inhibit ............................................................ 14
Reading Array Data ................................................................ 15
Reset Command ..................................................................... 15
Autoselect Command Sequence ............................................ 15
Word/Byte Program Command Sequence ............................. 15
Unlock Bypass Command Sequence ..................................... 16
Figure 3. Program Operation ..........................................................16
Chip Erase Command Sequence ........................................... 16
Sector Erase Command Sequence ........................................ 17
Erase Suspend/Erase Resume Commands ........................... 17
Figure 4. Erase Operation ...............................................................18
Command Definitions ............................................................. 19
Table 5. Am29LV200B Command Definitions................................. 19
DQ7: Data# Polling ................................................................. 20
Figure 5. Data# Polling Algorithm ...................................................20
RY/BY#: Ready/Busy# ........................................................... 21
DQ6: Toggle Bit I .................................................................... 21
DQ2: Toggle Bit II ................................................................... 21
Reading Toggle Bits DQ6/DQ2 ............................................... 21
DQ5: Exceeded Timing Limits ................................................ 22
DQ3: Sector Erase Timer ....................................................... 22
Figure 6. Toggle Bit Algorithm ........................................................ 22
Table 6. Write Operation Status..................................................... 23
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 24
Extended (E) Devices ............................................................. 24
VCC Supply Voltages .............................................................. 24
Figure 9. ICC1 Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 26
Figure 10. Typical ICC1 vs. Frequency ........................................... 26
Figure 11. Test Setup ..................................................................... 27
Table 7. Test Specifications ........................................................... 27
Key to Switching Waveforms. . . . . . . . . . . . . . . . 27
Figure 12. Input Waveforms and Measurement Levels ................. 27
Read Operations .................................................................... 28
Figure 13. Read Operations Timings ............................................. 28
Hardware Reset (RESET#) .................................................... 29
Figure 14. RESET# Timings .......................................................... 29
Word/Byte Configuration (BYTE#) ........................................ 30
Figure 15. BYTE# Timings for Read Operations ............................ 30
Figure 16. BYTE# Timings for Write Operations ............................ 30
Erase/Program Operations ..................................................... 31
Figure 17. Program Operation Timings .......................................... 32
Figure 18. Chip/Sector Erase Operation Timings .......................... 33
Figure 19. Data# Polling Timings (During Embedded Algorithms) . 34
Figure 20. Toggle Bit Timings (During Embedded Algorithms) ...... 34
Figure 21. DQ2 vs. DQ6 ................................................................. 35
Temporary Sector Unprotect .................................................. 35
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 35
Figure 23. Sector Protect/Unprotect Timing Diagram .................... 36
Alternate CE# Controlled Erase/Program Operations ............ 37
Figure 24. Alternate CE# Controlled Write Operation Timings ...... 38
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 39
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TS 048—48-Pin Standard TSOP ............................................ 40
SO 044—44-Pin Small Outline Package ................................ 41
FBA048—48-Ball Fine-Pitch Ball Grid Array, 0.80 mm pitch,
6 x 8 mm package .................................................................. 42
October 10, 2006 21521D6
Am29LV200B
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Am29LV200BT-80EE arduino
DATA SHEET
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state
machine. The state machine outputs dictate the func-
tion of the device. Table 1 lists the device bus
operations, the inputs and control levels they require,
and the resulting output. The following subsections
describe each of these operations in further detail.
Table 1. Am29LV200B Device Bus Operations
Read
Write
Operation
Standby
Output Disable
Reset
Sector Protect (Note 2)
Sector Unprotect (Note 2)
Temporary Sector
Unprotect
CE# OE# WE# RESET#
Addresses
(Note 1)
L LH
H
L HL
H
VCC ±
0.3 V
X
X
VCC ±
0.3 V
AIN
AIN
X
L HH
H
X
X XX
L
X
L HL
VID
Sector Address, A6 = L,
A1 = H, A0 = L
L HL
VID
Sector Address, A6 = H,
A1 = H, A0 = L
DQ0–
DQ7
DOUT
DIN
High-Z
High-Z
High-Z
DIN
DIN
DQ8–DQ15
BYTE#
BYTE#
= VIH
= VIL
DOUT DQ8–DQ14 = High-Z,
DIN DQ15 = A-1
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
XX
XX
X XX
VID
AIN
DIN DIN
High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 12.0 ± 0.5 V, X = Don’t Care, AIN = Addresses In, DIN = Data In, DOUT = Data Out
Notes:
1. Addresses are A16:A0 in word mode (BYTE# = VIH), A16:A-1 in byte mode (BYTE# = VIL).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector
Protection/Unprotection” section.
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins DQ15–DQ0 operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in
word configuration, DQ15–DQ0 are active and con-
trolled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to VIL. CE# is the power
control and selects the device. OE# is the output
control and gates array data to the output pins. WE#
should remain at VIH. The BYTE# pin determines
whether the device outputs array data in words or
bytes.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition. No
command is necessary in this mode to obtain array
data. Standard microprocessor read cycles that assert
valid addresses on the device address inputs produce
valid data on the device data outputs. The device
remains enabled for read access until the command
register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to Figure 13 for the timing diagram. ICC1 in the
DC Characteristics table represents the active current
specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which
includes programming data to the device and erasing
October 10, 2006 21521D6
Am29LV200B
9

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