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PDF 40EPS08PBF Data sheet ( Hoja de datos )

Número de pieza 40EPS08PBF
Descripción Input Rectifier Diode
Fabricantes Vishay 
Logotipo Vishay Logotipo



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No Preview Available ! 40EPS08PBF Hoja de datos, Descripción, Manual

40EPS..PbF High Voltage Series
Vishay High Power Products
Input Rectifier Diode, 40 A
Base
cathode
2
TO-247AC modified
1
Cathode
3
Anode
PRODUCT SUMMARY
VF at 40 A
IFSM
VRRM
1.1 V
475 A
800/1200 V
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
IF(AV)
VRRM
IFSM
Sinusoidal waveform
Range
VF 40 A, TJ = 25 °C
TJ
DESCRIPTION/FEATURES
The 40EPS..PbF rectifier High Voltage Series has
been optimized for very low forward voltage drop, Pb-free
with moderate leakage. The glass passivation Available
technology
used
has
reliable
operation
up
to
RoHS*
COMPLIANT
150 °C junction temperature.
Typical applications are in input rectification and these
products are designed to be used with Vishay HPP
Switches and output rectifiers which are available in identical
package outlines.
This product has been designed and qualified for industrial
level and lead (Pb)-free.
VALUES
40
800/1200
475
1.1
- 40 to 150
UNITS
A
V
A
V
°C
VOLTAGE RATINGS
PART NUMBER
40EPS08PbF
40EPS12PbF
VRRM, MAXIMUM
PEAK REVERSE VOLTAGE
V
800
1200
VRSM, MAXIMUM NON-REPETITIVE
PEAK REVERSE VOLTAGE
V
900
1300
IRRM
AT 150 °C
mA
1
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum average forward current
Maximum peak one cycle
non-repetitive surge current
IF(AV)
IFSM
TC = 105 °C, 180° conduction half sine wave
10 ms sine pulse, rated VRRM applied
10 ms sine pulse, no voltage reapplied
Maximum I2t for fusing
I2t 10 ms sine pulse, rated VRRM applied
10 ms sine pulse, no voltage reapplied
Maximum I2t for fusing
I2t t = 0.1 to 10 ms, no voltage reapplied
VALUES
40
400
475
800
1131
11 310
UNITS
A
A2s
A2s
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 94343
Revision: 06-Jun-08
For technical questions, contact: [email protected]
www.vishay.com
1

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40EPS08PBF pdf
www.vishay.com
DIMENSIONS in millimeters and inches
B
(2) R/2
Q
2xR
(2)
(3)
E
N
S
D
12
3
(5) L1
CL
2 x b2
3xb
2x e
b4
0.10 M C A M
See view B
A
A2
A
D
A
C
A1
Outline Dimensions
Vishay Semiconductors
A
(6) ΦP
Ø KM DBM
D2
(Datum B)
ΦP1
Thermal pad
D1 (4)
4
(4)
E1
View A - A
Planting
(b1, b3, b5)
Base metal
(c) c1
D DE E
CC
Lead assignments
Diodes
1. - Anode/open
2. - Cathode
3. - Anode
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
SYMBOL
MILLIMETERS
MIN. MAX.
INCHES
NOTES
MIN. MAX.
SYMBOL
MILLIMETERS
MIN. MAX.
INCHES
NOTES
MIN. MAX.
A 4.65 5.31 0.183 0.209
D2 0.51 1.30 0.020 0.051
A1 2.21 2.59 0.087 0.102
E
15.29 15.87 0.602 0.625
3
A2 1.50 2.49 0.059 0.098
E1 13.72 - 0.540 -
b 0.99 1.40 0.039 0.055
e
5.46 BSC
0.215 BSC
b1 0.99 1.35 0.039 0.053
K 2.54
0.010
b2 1.65 2.39 0.065 0.094
L 14.20 16.10 0.559 0.634
b3 1.65 2.37 0.065 0.094
L1 3.71 4.29 0.146 0.169
b4 2.59 3.43 0.102 0.135
N 7.62 BSC
0.3
b5 2.59 3.38 0.102 0.133
P 3.56 3.66 0.14 0.144
c 0.38 0.86 0.015 0.034
P1 - 6.98 - 0.275
c1 0.38 0.76 0.015 0.030
Q 5.31 5.69 0.209 0.224
D
19.71 20.70 0.776 0.815
3
R 4.52 5.49 1.78 0.216
D1 13.08 - 0.515 -
4
S
5.51 BSC
0.217 BSC
Notes
(1) Dimensioning and tolerance per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c
Revision: 21-Jun-11
1 Document Number: 95253
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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