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PDF E0C624A Data sheet ( Hoja de datos )

Número de pieza E0C624A
Descripción 4-bit Single Chip Microcomputer
Fabricantes Epson 
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PF647-05
E0C624A
4-bit Single Chip Microcomputer
q Core CPU Architecture
q Dot Matrix LCD Driver
q Programmable SVD Circuit/Sound Generator
s DESCRIPTION
The E0C624A is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 4-bit core
CPU. The chip contains the ROM, RAM, dot matrix LCD driver, programmable SVD circuit, time base counter
and clock synchronous serial port.
Interfacing with the external memory, the E0C624A can be applied to any system requiring large memory such
as schedule reminder, and dot matrix display function.
s FEATURES
q CMOS LSI 4-bit parallel processing
q Clock ..................................................... 32.768kHz/2MHz (Max.) (selectable by software)
q Instruction set ........................................ 108 instructions
q Instruction cycle time ............................ 153µsec, 214µsec or 366µsec at 32kHz
(depending on instruction)
5µsec, 7µsec or 12µsec at 1MHz
(depending on instruction)
q ROM capacity ....................................... 6,144 × 12 bits
q RAM capacity ........................................ 640 × 4 bits
q External memory capacity .................... Read/Write 512K bits (Max.)
Read only 1M bits (Max.)
q Input port ............................................... 8 bits (pull-up resistors are available by mask option)
q Output port ............................................ 20 bits (clock output or buzzer output is available by mask option)
q I/O port .................................................. 16 bits (pull-up resistors are available by mask option)
q Serial I/O port ........................................ 1 port (clock sync.)
q Dot matrix LCD driver ........................... 40 segments × 8 commons/40 segments × 16 commons
(1/8 or 1/16 duty is selectable by mask option)
q Built-in SVD circuit ................................ 2.3V/2.6V/3.3V/4.5V programmable
q Built-in stopwatch timer
q Built-in watchdog timer
q Built-in time base counter ..................... 3 lines
q Interrupts ............................................... External : Input interrupt
2 lines
Internal : Timer interrupt
3 lines
Serial I/O interrupt 1 line
q Built-in sound generator ........................ With digital envelope (8 sounds programmable)
q Supply voltage ...................................... 2.2V to 5.5V
q Current consumption ............................ HALT mode (32kHz)
: 2.5µA (Typ.)
OPERATING mode (1MHz) : 400µA (Typ.)
q Package ................................................ QFP5-128pin (plastic)
Die form
SEIKO EPSON CORPORATION
1 http://www.Datasheet4U.com

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E0C624A pdf
E0C624A
q Analog Circuit Characteristics and Current Consumption
(Unless otherwise specified: VDD=0V,VSS=-3.0V,VL1=-1.0V,VL2=-2.0V,VL4=-3.0V,VL5=-4.0V,fOSC1=32.768kHz,fOSC3=1MHz,Ta=25°C,C1–C8=0.047µF)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Liquid crystal drive voltage VL1 Connect 1Mload resistor between VDD and VL1
1/2•VL2
1/2•VL2
V
(Normal mode)
(No panel load)
-0.1 ×0.95
VL2 Connect 1Mload resistor
LC="0"
-1.80
between VDD and VL2
LC="1"
-1.85
(No panel load)
LC="2"
-1.90
LC="3"
-1.95
LC="4"
-2.01
LC="5"
-2.06
LC="6"
-2.11
LC="7"
Typ.×1.12 -2.17 Typ.×0.88 V
LC="8"
-2.22
LC="9"
-2.27
LC="10"
-2.32
LC="11"
-2.38
LC="12"
-2.43
LC="13"
-2.48
LC="14"
-2.53
LC="15"
-2.59
VL4 Connect 1Mload resistor between VDD and VL4
3/2•VL2
3/2•VL2
V
(No panel load)
×0.95
VL5 Connect 1Mload resistor between VDD and VL5
2•VL2
2•VL2
V
(No panel load)
×0.95
Liquid crystal drive voltage VL1 Connect 1Mload resistor
LC="0"
-0.92
(Heavy load
between VDD and VL1
LC="1"
-0.95
protection mode)
(No panel load)
LC="2"
-0.97
LC="3"
-1.00
LC="4"
-1.03
LC="5"
-1.05
LC="6"
-1.08
LC="7"
Typ.×1.12 -1.11 Typ.×0.88 V
LC="8"
-1.13
LC="9"
-1.16
LC="10"
-1.18
LC="11"
-1.21
LC="12"
-1.24
LC="13"
-1.26
LC="14"
-1.29
LC="15"
-1.32
VL2 Connect 1Mload resistor between VDD and VL2
2•VL1
2•VL1
V
(No panel load)
×0.90
VL4 Connect 1Mload resistor between VDD and VL4
3•VL1
3•VL1
V
(No panel load)
×0.90
VL5 Connect 1Mload resistor between VDD and VL5
4•VL1
4•VL1
V
(No panel load)
×0.90
SVD voltage
VSVD0 SVC="0"
-2.35
-2.20
-2.05
V
VSVD1 SVC="1"
-2.70
-2.50
-2.30
V
VSVD2 SVC="2"
-3.30
-3.10
-2.90
V
SVD circuit response time
VSVD3 SVC="3"
tSVD
-4.50
-4.20
-3.90
100
V
µS
Current consumption
Ihlt During HALT
No panel load *1
2.5 5.0 µA
IEX1 During operation at 32kHz
6.5 9.0 µA
IEX2 During operation at 1MHz
No panel load *2
400 600 µA
IEX3 During operation at 2MHz
No panel load *3
1,000 1,500
µA
1: SVD circuit: OFF status, VSC = "0", OSC1: oscillating with crystal, OSCC= "0"
2: SVD circuit: OFF status, VSC = "1", OSC1: oscillating with crystal
3: SVD circuit: OFF status, VSC = "2", OSC1: oscillating with crystal, VSS = -5.0V
5

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