PDF IDTF1200 Data sheet ( Hoja de datos )

Número de pieza	IDTF1200
Descripción	Intermediate Frequency Digital Variable Gain Amplifier
Fabricantes	Integrated Device Technology
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No Preview Available ! DATASHEET Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 GENERAL DESCRIPTION The IDTF1200 is a Digitally Controlled Intermediate Frequency Differential Variable Gain Amplifier for BaseStation and other commercial applications with a low IF frequency. The device offers extremely low Noise Figure over the entire gain control range. The device is packaged in compact 5x5 Thin QFNs with 200 ohm differential input and output impedances for ease of integration into the receiver lineup. Versions covering IF frequencies up to 300 MHz with low distortion are available. COMPETITIVE ADVANTAGE The F1200 acts to enhance system SNR when VGA gain is reduced. The F1200 noise figure (NF) degrades only slightly (NF slope ~ -0.16 dB/dB) over a 13 dB control range while holding the Output IP3 approximately constant. The resultant improvement in noise can enhance the system SNR up to 2 decibels at low gain settings relative to a standard VGA. The device has excellent DNL and INL simplifying digital compensation. The device also offers the extremely low Harmonic, IM2, and IM3 distortion necessary to drive an ADC directly in an IF sub-sampling application. FEATURES  Ideal for high SNR systems  22 dB typ Maximum Gain  23 dB gain control range  7 bit parallel control  0.25 dB Gain Steps  Excellent Noise Figure < 3.0 dB  5mm x 5mm 28 pin package  200 Ω Differential Input  200 Ω Differential Output  NF degrades < 2dB @ 12dB reduced gain  50 MHz – 160 MHz frequency range  Ultra-Linear: IP3O +48 dBm typical  External current setting resistor  Fast Gain Step Settling < 20 nsec DEVICE BLOCK DIAGRAM ` ATTN Out AMP In APPLICATIONS  BaseStation Diversity Receivers  Digital Pre-Distortion  Wave Point-to-Point Radios  Public Safety Receivers ATTN In Gain 7 Control Decode Logic AMP out Bias Control VCC PART# MATRIX Part# F1200 Gain Range 22 to -1 IP3O 48 IF freq range 50 - 160 NF 2.6 F1206* 20 to -11 47 150 - 250 3.6 F1207* 20 to -11 46 230 - 300 3.7 *Future Product VCC VMODE ISET STBY ` ORDERING INFORMATION Omit IDT prefix 0.75 mm height Tape & package Reel IDTF1200NBGI8 RF product Line Green Industrial Temp range RevO Page 1 of 13 April, 2011 http://www.Datasheet4U.com 1 page DATASHEET Intermediate Frequency Digital Variable Gain Amplifier TOCS CONTINUED IDTF1200 S11 vs. Gain Setting 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -1 3 7 11 15 Gain Setting (dB) S21 vs. Gain Setting 22 20 18 16 14 12 10 8 6 4 2 0 -2 -1 3 7 11 15 Gain Setting (dB) EVKit NF & Output IP3 Correction 50 MHz 100 MHz 150 MHz 19 23 50 MHz 100 MHz 150 MHz 19 23 1.6 1.2 0.8 0.4 0.0 -0.4 -0.8 -1.2 -1.6 0 Correct EVkit measured Output IP3 by this amount to account for trace & transformer losses Correct EVkit measured Noise Figure by this amount to account for trace & transformer losses 50 100 150 200 Frequency (MHz) NF correction IP3 correction 250 300 S22 vs. Gain Setting 0 -5 -10 -15 -20 -25 -30 -35 50 MHz -40 100 MHz 150 MHz -45 -50 -1 3 7 11 15 19 23 Gain Setting (dB) S21 Phase vs. Gain Setting 40 50 MHz 35 100 MHz 30 150 MHz 25 20 15 10 5 0 -5 -10 -1 3 7 11 15 19 23 Gain Setting (dB) EVKit Gain Correction 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 Correct EVkit measured Gain by this amount to account for trace & transformer losses 50 100 150 200 250 300 Frequency (MHz) RevO Page 5 of 13 April, 2011 5 Page Intermediate Frequency Digital Variable Gain Amplifier PIN DESCRIPTIONS DATASHEET IDTF1200 Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name GND VCC_ATTN ATTN_IN+ ATTN_IN- Ground Ground Ground GC6 GC5 GC4 GC3 GC2 GC1 GC0 VCC_DIG DIG_GND VMODE AMP_OUT+ AMP_OUT- STBY ISET VCC_Amp_Bias Bias_Amp AMP_IN+ E_Amp AMP_IN- ATTN_OUT- ATTN_OUT+ Exposed Paddle Function Attenuator Power Supply Attenuator_0 Differential Input P Attenuator_0 Differential Input M Untested - SPI Chip Select Input Untested - SPI Data Input Untested - SPI Clock Input Parallel Gain Control Input – MSB (16 dB step) Parallel Gain Control Input Parallel Gain Control Input Parallel Gain Control Input Parallel Gain Control Input Parallel Gain Control Input Parallel Gain Control Input – LSB (0.25 dB step) Digital Circuit Power Supply Connect directly to Ground Untested – SPI Enable Connect to PCB GND for normal parallel operation Amplifier Differential Output P Amplifier Differential Output M Amplifier Power Down. Ground for Normal operation Current Setting Resistor. Connect recommended value (2.87K) to ground. Use 1% tolerance Amplifier and Bias Circuit Power Supply Amplifier Bias External Pin for Decoupling Capacitor Amplifier Differential Input P Amplifier Common Emitter Amplifier Differential Input M Attenuator_0 Differential Output M Attenuator_0 Differential Output P RevO Page 11 of 13 April, 2011 11 Page

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