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PDF EC5575A Data sheet ( Hoja de datos )

Número de pieza EC5575A
Descripción 14+1 Channels Voltage Buffer with OTP/OCP for TFT LCD
Fabricantes E-CMOS 
Logotipo E-CMOS Logotipo



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No Preview Available ! EC5575A Hoja de datos, Descripción, Manual

14+1 Channels Voltage Buffer with
OTP/OCP for TFT LCD
EC5575A
FEATURES
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APPLICATIONS
TFT-LCD Reference Driver
PIN ASSIGNMENT
GENERAL DESCRIPTION
The EC5575A is a 14+1 channel voltage buffers that
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EC5575A is available in a space saving
48-pin TQFP package, and the operating
temperature is from 20°C to +85°C.
E-CMOS Corp. (www.ecmos.com.tw)
1/6
3K29N-Rev. F001
http://www.Datasheet4U.com

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EC5575A pdf
14+1 Channels Voltage Buffer with
OTP/OCP for TFT LCD
EC5575A
Where:
TJmax = Maximum Junction Temperature
TAmax= Maximum Ambient Temperature
ΘJA = Thermal Resistance of the Package
PDmax = Maximum Power Dissipation in the Package.
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the
total power supply voltage, plus the power in the IC
due to the loads, or:
PDmax =i[VS * ISmax + (VS+ VO) * IL]
When sourcing, and
PDmax = i[VS * ISmax + (VO VS-) * IL]
When sinking.
Where:
i = 1 to 15
VS = Total Supply Voltage
ISmax = Maximum Supply Current Per Amplifier
VO = Maximum Output Voltage of the Application
IL= Load current
RL= Load Resistance = (VS+ VO)/IL = (VO VS-)/ IL
A calculation for RL to prevent device from overheat
can be easily solved by setting the two PDmax
equations equal to each other.
Driving Capacitive Loads
The EC5575A is designed to drive a wide range of
capacitive loads. In addition, the output current
handling capability of the device allows for good
slewing characteristics even with large capacitive
loads. The combination of these features make the
EC5575A ideally for applications such as TFT LCD
panel grayscale reference voltage buffers, ADC input
amplifiers, etc.
As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the
peaking increase. Depending on the application, it
must be necessary to reduce peaking and to improve
device stability. To improve device stability, a small
v a l u e o f series resistor (usually between 5Ωand
50Ω) must be placed in series with the output. The
advantage is that it improves the settling and
overshooting performance with very large capacitive
loads. Figure 3 shows the typical application
configuration.
Figure 3. Typical Application Configuration.
Power Supply Bypassing and Printed Circuit
Board Layout
With high phase margin, the EC5575A performs
stable gain at high frequency. Like any high-
frequency device, good layout of the printed circuit
board usually comes with optimum performance.
Ground plane construction is highly recommended,
lead lengths should be as short as possible and the
power supply pins must be well bypassed to reduce
the risk of oscillation. For normal single supply
operation, where the VS- pin is connected to ground,
a 0.1 µF ceramic capacitor should be placed from
VS+ pin to VS- pin as a bypassing capacitor. A 4.7µF
tantalum capacitor should then be connected in
parallel, placed in the region of the amplifier. One
4.7µF capacitor may be used for multiple devices.
This same capacitor combination should be placed at
each supply pin to ground if split supplies are to be
used.
E-CMOS Corp. (www.ecmos.com.tw)
5/6
3K29N-Rev. F001

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