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PDF 25LC640 Data sheet ( Hoja de datos )
| Número de pieza | 25LC640 | |
| Descripción | 64K SPI Bus Serial EEPROM | |
| Fabricantes | MicrochipTechnology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 25LC640 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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25AA640/25LC640
64K SPI™ Bus Serial EEPROM
Device Selection Table
Part
Number
25AA640
25LC640
25LC640
VCC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max Clock
Frequency
1 MHz
2 MHz
3/2.5 MHz
Temp
Ranges
I
I
I, E
Features
• Low-power CMOS technology
- Write current: 3 mA typical
- Read current: 500 µA typical
- Standby current: 500 nA typical
• 8192 x 8 bit organization
• 32 byte page
• Write cycle time: 5 ms max.
• Self-timed ERASE and WRITE cycles
• Block write protection
- Protect none, 1/4, 1/2 or all of array
• Built-in write protection
- Power on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential read
• High reliability
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-pin PDIP, SOIC and TSSOP packages
• Temperature ranges supported:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Package Types
PDIP/SOIC
CS 1
8 VCC
SO 2
7 HOLD
WP 3
6 SCK
VSS 4
5 SI
Description
The Microchip Technology Inc. 25AA640/25LC640
(25XX640*) is a 64K bit Serial Electrically Erasable
PROM [EEPROM]. The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused,
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
Block Diagram
Status
Register
HV Generator
I/O Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page
Latches
SI
SO
CS
SCK
HOLD
WP
VCC
VSS
Y Decoder
Sense Amp.
R/W Control
TSSOP
HOLD
VCC
CS
SO
1
2
3
4
8 SCK
7 SI
6 VSS
5 WP
*25XX640 is used in this document as a generic part number for the 25AA640/25LC640 devices.
2003 Microchip Technology Inc.
DS21223F-page 1
1 page  
TABLE 1-3: AC TEST CONDITIONS
AC Waveform:
VLO = 0.2V
VHI = VCC - 0.2V
(Note 1)
VHI = 4.0V
(Note 2)
Timing Measurement Reference Level
Input
0.5 VCC
Output
0.5 VCC
Note 1: For VCC ≤ 4.0V
2: For VCC > 4.0V
25AA640/25LC640
FIGURE 1-4:
AC TEST CIRCUIT
VCC
2.25 kΩ
SO
1.8 kΩ
100 pF
2003 Microchip Technology Inc.
DS21223F-page 5
5 Page 
25AA640/25LC640
3.6 Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the Status
register. The array is divided up into four segments.
The user has the ability to write-protect none, one, two,
or all four of the segments of the array. The partitioning
is controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the Status register control the program-
mable hardware write-protect feature. Hardware write
protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes
to nonvolatile bits in the Status register are disabled.
See Table 3-3 for a matrix of functionality on the WPEN
bit.
See Figure 3-7 for WRSR timing sequence.
TABLE 3-2:
BP1
0
0
1
1
ARRAY PROTECTION
BP0
Array Addresses
Write-Protected
0 none
1 upper 1/4
(1800h - 1FFFh)
0 upper 1/2
(1000h - 1FFFh)
1 all
(0000h - 1FFFh)
FIGURE 3-7:
WRITE STATUS REGISTER TIMING SEQUENCE
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Instruction
Data to Status Register
0 00 00 0 01 7 6 54 3 2 10
high-impedance
SO
2003 Microchip Technology Inc.
DS21223F-page 11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet 25LC640.PDF ] | |
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