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PDF 24LCS21A Data sheet ( Hoja de datos )
| Número de pieza | 24LCS21A | |
| Descripción | 1K 2.5V Dual Mode I2C Serial EEPROM | |
| Fabricantes | MicrochipTechnology | |
| Logotipo |  |
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24LCS21A
1K 2.5V Dual Mode I2C™ Serial EEPROM
Features:
• Single Supply with Operation Down to 2.5V
• Completely Implements DDC1™/DDC2™ Inter-
face for Monitor Identification, Including Recovery
to DDC1
• Low-Power CMOS Technology:
- 1 mA active current, typical
- 10 μA standby current, typical at 5.5V
• 2-Wire Serial Interface Bus, I2C™ Compatible
• 100 kHz (2.5V) and 400 kHz (5V) Compatibility
• Self-Timed Write Cycle (including Auto-Erase)
• Hardware Write-Protect Pin
• Page Write Buffer for up to Eight Bytes
• 1,000,000 Erase/Write Cycles Ensured
• Data Retention > 200 years
• ESD Protection > 4000V
• 8-pin PDIP and SOIC Package
• Available for Extended Temperature Ranges:
- Industrial (I): -40°C to +70°C
• Pb-Free and RoHS Compliant
Description:
The Microchip Technology Inc. 24LCS21A is a
128 x 8-bit dual-mode Electrically Erasable PROM.
This device is designed for use in applications
requiring storage and serial transmission of configura-
tion and control information. Two modes of operation
have been implemented: Transmit-Only mode and
Bidirectional mode. Upon power-up, the device will be
in the Transmit-Only mode, sending a serial bit stream
of the memory array from 00h to 7Fh, clocked by the
VCLK pin. A valid high-to-low transition on the SCL
pin will cause the device to enter the Transition mode
and look for a valid control byte on the I2C bus. If it
detects a valid control byte from the master, it will
switch into Bidirectional mode, with byte selectable
read/write capability of the memory array using SCL.
If no control byte is received, the device will revert to
the Transmit-Only mode after it receives 128 consec-
utive VCLK pulses while the SCL pin is idle. The
24LCS21A also enables the user to write-protect the
entire memory array using its write-protect pin. The
24LCS21A is available in a standard 8-pin PDIP and
SOIC package in industrial temperature range.
DDC is a trademark of the Video Electronics Standards Assoc.
I2C is a trademark of Philips Corporation.
Package Types
PDIP
NC 1
NC 2
WP 3
Vss
SOIC
NC
NC
WP
Vss
4
1
2
3
4
8 Vcc
7 VCLK
6 SCL
5 SDA
8 Vcc
7 VCLK
6 SCL
5 SDA
Block Diagram
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
SDA SCL
VCLK
VCC
VSS
Pin Function Table
EEPROM
Array
Page Latches
YDEC
Sense AMP
R/W Control
Name
WP
VSS
SDA
SCL
VCLK
VCC
NC
Function
Write-Protect (active low)
Ground
Serial Address/Data I/O
Serial Clock (Bidirectional mode)
Serial Clock (Transmit-Only mode)
+2.5V to 5.5V Power Supply
No Connection
© 2007 Microchip Technology Inc.
DS21161H-page 1
1 page  
24LCS21A
3.0 BIDIRECTIONAL MODE
Before the 24LCS21A can be switched into the
Bidirectional mode (Figure 3-1), it must enter the Tran-
sition mode, which is done by applying a valid high-to-
low transition on the Bidirectional mode clock (SCL). As
soon it enters the Transition mode, it looks for a control
byte, ‘1010 000X’ on the I2C™ bus, and starts to
count pulses on VCLK. Any high-to-low transition on
the SCL line will reset the count. If it sees a pulse count
of 128 on VCLK while the SCL line is idle, it will revert
back to the Transmit-Only mode and transmit its con-
tents starting with the Most Significant bit in address
00h. However, if it detects the control byte on the I2C™
bus, (Figure 3-2) it will switch to the Bidirectional mode.
Once the device has made the transition to the Bidirec-
tional mode, the only way to switch the device back to
the Transmit-Only mode is to remove power from the
device. The mode transition process is shown in detail
in Figure 3-3.
Once the device has switched into the Bidirectional
mode, the VCLK input is disregarded, with the
exception that a logic high level is required to enable
write capability. This mode supports a two-wire
Bidirectional data transmission protocol (I2C™). In this
protocol, a device that sends data on the bus is defined
to be the transmitter, and a device that receives data
from the bus is defined to be the receiver. The bus must
be controlled by a master device that generates the
Bidirectional mode clock (SCL), controls access to the
bus and generates the Start and Stop conditions, while
the 24LCS21A acts as the slave. Both master and
slave can operate as transmitter or receiver, but the
master device determines which mode is activated. In
the Bidirectional mode, the 24LCS21A only responds
to commands for device ‘1010 000X’.
FIGURE 3-1:
MODE TRANSITION WITH RECOVERY TO TRANSMIT-ONLY MODE
MODE Transmit-Only
Bidirectional
TVHZ
SCL
SDA
VCLK count =
VCLK
1234
Recovery to Transmit-Only mode
127 128
(MSB of data in 00h)
Bit 8
FIGURE 3-2:
SUCCESSFUL MODE TRANSITION TO BIDIRECTIONAL MODE
Transmit-Only
MODE
SCL
Bidirectional
Transition mode with possibility to return to Transmit-Only mode permanently
SDA
VCLK count = 1 2
VCLK
S 1 0 1 0 0 0 0 0 ACK
n0
n < 128
© 2007 Microchip Technology Inc.
DS21161H-page 5
5 Page 
5.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
Read or Write command. See Figure 5-1 for the flow
diagram.
24LCS21A
FIGURE 5-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
FIGURE 5-2:
Bus Activity
Master
SDA Line
Bus Activity
PAGE WRITE
S
T
A
R
T
Control
Byte
S
A
C
K
Word
Address
Data (n)
A
C
K
Data n + 1
Data n + 7
S
T
O
P
P
AA
CC
KK
A
C
K
VCLK
© 2007 Microchip Technology Inc.
DS21161H-page 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet 24LCS21A.PDF ] | |
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