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PDF TDA3842 Data sheet ( Hoja de datos )

Número de pieza TDA3842
Descripción Multistandard TV IF amplifier and demodulator
Fabricantes Philips 
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No Preview Available ! TDA3842 Hoja de datos, Descripción, Manual

Philips Semiconductors
Multistandard TV IF amplifier and
demodulator with TV signal identification
Preliminary specification
TDA3842
FEATURES
Low supply voltage range, from 5.0 V to 8.0 V
Low power dissipation, 200 mW at 5 V
High supply ripple rejection
Wide IF bandwidth of 80 MHz
Synchronous demodulator with low differential phase
and gain
Additional video buffer with a wide bandwidth of 10MHz
Video off switch
Peak sync AGC for negative modulation, e.g. B/G
Peak white AGC for positive modulation, e.g. L
Adjustable take-over point (TOP); positive AGC slope
Switching to fast AGC dependent on TV identification
Alignment free AFC detector with integrated phase shift
ESD protection
TV signal identification
Options: tracking of reference circuit, suitable for
MAC-on-cable
GENERAL DESCRIPTION
The TDA3842 is a bipolar integrated circuit for vision
IF-signal processing in multistandard TV and VTRs,
designed for a supply voltage range from 5.0 V to 8.0 V.
QUICK REFERENCE DATA
SYMBOL
VP
IP
V1-20(rms)
Vo
Gv
S/N
V8
SAFC
RR
PARAMETER
supply voltage range (pin 15)
supply current (pin 15)
IF input signal for nominal video output
voltage at pin 14 (RMS value)
minimum IF input signal for TV signal
identification at pin 6 (RMS value)
video output signal (pin 12)
IF voltage gain control range
signal-to-noise ratio
AFC output voltage swing
AFC steepness (pin 8)
supply voltage ripple rejection (pin 12)
CONDITIONS MIN.
VP = 5.0 V
f = 38.9 MHz
4.75
maximum Gv
buffered
V1-20 =1 0m V
55
30
TYP.
5.0
42
70
20
2.0
66
60
4.0
2
35
MAX.
8.8
−µ
UNIT
V
mA
V
40 µV
V
dB
dB
V
−µ A/kHz
dB
ORDERING INFORMATION
EXTENDED
TYPE NUMBER
TDA3842
TDA3842T
PINS
20
20
Notes
1. SOT146-1; 1997 January 08.
2. SOT163-1; 1997 January 08
PIN POSITION
DIL
mini-pack
PACKAGE
MATERIAL
plastic
plastic
CODE
SOT146 (1)
SO20L; SOT163A (2)
April 1991
2
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TDA3842 pdf
Philips Semiconductors
Multistandard TV IF amplifier and
demodulator with TV signal identification
Preliminary specification
TDA3842
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
vp
v19
v8
I15
Tstg
Tamb
vESD
supply voltage at pin 15:
SOT146
SOT163A
tuner AGC voltage
permissible voltage at AFC output
supply current
storage temperature range
operating ambient temperature range
ESD sensitivity
MIN.
25
0
−±
MAX.
8.8
6.0
13.2
VP
55
+ 150
+ 70
300
UNIT
V
V
V
V
mA
°C
°C
V
CHARACTERISTICS
VP = 5 V and Tamb = 25 °C; fVC = 38.9 MHz; all voltages are measured to GND (pin 17); measured in test circuit of
Fig.4.; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VP
supply voltage range (pin 15)
DIL-package
SO-package
IP supply current (pin 15)
VP = 5.0 V
RR ripple rejection (pin 12)
4.75 5.0 8.8 V
4.75 5.0 6.0 V
42 mA
30 35
dB
IF amplifier
B bandwidth
3d B
80
RI
CI
V1-20(rms)
Gv
input resistance (pins 1 and 20)
input capacitance (pins 1 and 20)
IF input signal (RMS value)
maximum IF input signal
gain control range
video output 1d B
minimum Gv; note 1
2
1.5
70
100 −−
63 66
−µ
IF AGC: negative modulation
I18 leakage current AGC capacitor
−− 1
charging current AGC capacitor
with video identification
13 −µ
charging current AGC capacitor
without video identification
35 −µ
I18M discharging peak current capacitor
2
t1
response time of IF input signal
50 dB increasing step 1
change
50 dB decreasing step
150
MHz
k
pF
V
mV
dB
µA
A
A
mA
ms
ms
IF AGC: standard L (note 2)
I18 leakage current AGC capacitor
charging current AGC capacitor
I18M discharging peak current capacitor
t2 response time of IF input signal
change
with video identification
without video identification
50 dB increasing step
50 dB decreasing step
−−
20
280
22 −µ
2
1
300
nA
nA
A
mA
ms
ms
April 1991
6

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TDA3842 arduino
Philips Semiconductors
Multistandard TV IF amplifier and
demodulator with TV signal identification
Preliminary specification
TDA3842
Fig.7 Signal-to-noise ratio as a function of IF input voltage (RMS value) at pins 1 and 20.
April 1991
SC = sound carrier level; with respect to TOP sync level
CC = chrominance carrier level; with respect to TOP sync level
PC = picture carrier level; with respect to TOP sync level
Sound trap attenuation: 17 dB
Fig.8 Input conditions for intermodulation measurements.
12

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