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Número de pieza FA5695
Descripción Switching Power Supply Control IC Application Note
Fabricantes Fuji 
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No Preview Available ! FA5695 Hoja de datos, Descripción, Manual

FA5695N, FA5696N
Fuji Switching Power Supply Control IC
Power Factor Correction
FA5695/FA5696
Application Note
Fuji Electric Co., Ltd.
AN-073E Rev.1.2
Mar-2012
Mar-2012
Fuji Electric Co., Ltd.
1 http://www.fujielectric.co.jp/products/semiconductor/

1 page




FA5695 pdf
5. Block diagram
FA5695N, FA5696N
RT
3
VCC
SP
UVLO
2.63V
Soft
Start
Dynamic
- OVP
+
RAMP
OSC
FB
COMP
-
2.5V + Erramp
0.3V/0.2V
-
Short
Comp
+
2.71V/2.61V
SOVP
+ Comp
-
SP
SOVP
IS
-0.6V +
-
6. Pin assignment
VCC OUT GND
876
IS
5
5.0V
PWM
+Comp
-
Filter
40ns
SP
REF
UVLO
Comp
-
+
28V
UVLO
1133.0.0VV/9/.90.V0V(FA5695)
9.6V/9.0V(FA5696)
RQ
SQ
F.F.
Driver
OUT
R
S
TIMER
OVP
Comp
2.71V/2.61V
GND
ZCD
Comp
-10mV
OVP
123
FB COMP RT
4
OVP
Pin Pin
No. symbol
1 FB
2 COMP
3 RT
4 OVP
5 IS
6 GND
7 OUT
8 VCC
Function
Feedback Voltage Input
Compensation
Set Maximum on time
Over voltage detection
Current Sense Input
Ground
Output
Power Supply
Description
Input for monitoring PFC output voltage
Output of error amplifier
Set Maximum on time by connecting
resistor
Monitor the output of converter and protects
from over voltage
Input for sensing current
Ground
Output for driving a power MOSFET
Power supply for IC
Fuji Electric Co., Ltd.
AN-073E Rev.1.2
Mar-2012
5 http://www.fujielectric.co.jp/products/semiconductor/

5 Page





FA5695 arduino
FA5695N, FA5696N
9. Outline of circuit operation
This IC is a power-factor correction converter
utilizing a boosting chopper, operating in critical
mode. Hereinafter is outline of the operation
consisting of switching operation and power-factor
correction operation using the circuit diagram
shown in Fig. 1.
(1) Switching operation
This IC performs the switching operation in the
critical mode applying self-oscillation without using
an oscillator. Fig. 2 shows the outline of waveforms
of the switching operation in steady state. The
operation is as follows.
t1. Q1 turns on, the current through inductor (L1)
rises from zero. At the timing of Q1 on, Vramp;
output of ramp generator states to rise.
t2. Vramp and Vcomp; output of the error amplifier
are compared by the PWM comparator, and
when Vramp>Vcomp, Q1 turns off and the
output of the ramp generator drops.
When Q1 turns off, the voltage across L1 inverts
and the current through L1 decreases while the
current is supplied to the output side through D1.
t3.The current through L1 is detected by Is terminal,
and when the current becomes zero, the output
of the current detection comparator becomes
High to turn on Q1 after delay given by the delay
circuit, thus moving to the next switching cycle
(t1).
Iin IL1
AC C1
By repeating the operations of t1 ~ t3, the switching
in critical mode is continued.
With the power-factor correction circuit in the
critical mode, the switching frequency is always
changing due to instantaneous values of the AC
input voltage. The switching frequency also
changes when the input voltage or load changes.
OUT
(Q1 gate)
Q1
Vds
IL1
Vcomp
Vramp
PWM.comp.
output
(reset)
ZCD.comp.
output
(set) Fig. 2 Switching Operation, Waveforms
t1 t2 t3 t1
L1 D1 Vo
Q1
Vds
Rs
IS
5
CUR.comp
ZCD.comp
-10mV
RT
3
Delay
-0.6V
Restart
RAMP
OSC
PWM.comp
COMP
2
Dynamic
OVP
Static
OVP
OUT
7
RQ
UVLO
S SP
TIMER
Restart
FB
1
ERRAMP 2.5V
SFPAC57609151/9F6
4
OVP
Fig.1 Block diagram of operating circuit
Fuji Electric Co., Ltd.
AN-073E Rev.1.2
Mar-2012
11 http://www.fujielectric.co.jp/products/semiconductor/

11 Page







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