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PDF TC9446FG Data sheet ( Hoja de datos )
| Número de pieza | TC9446FG | |
| Descripción | Audio Digital Processor | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC9446FG (archivo pdf) en la parte inferior de esta página. Total 41 Páginas | ||
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TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9446FG
TC9446FG
Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio
TC9446FG is the various digital signal processor for decoding.
It contains the decode processing program which embraced
encoding signals, such as Dolby Digital (AC-3)/Pro Logic (Note 1),
MPEG2 audio and DTS (Note 2).
Decoding of Dolby Digital or MPEG2 audio is made with a
single chip. Moreover, an external memory can be connected to
the TC9446FG to decode DTS.
Features
P-QFP100-1420-0.65Q
• Dolby digital (AC-3) or MPEG2 audio decode
Weight: 1.57 g (typ.)
Acceptable bit rate upto 640 kbps
• Audio interface
4 output port, 2 input port (2 port of LRCK and BCK)
DIR (digital audio interface receiver) built-in
DIT (digital audio interface transmitter) built-in
DIR and DIT are available upto 96 kHz sampling of 2 channel
• Operating clock: DLL oscillator upto 6th times for DSP clock
• Instruction cycle: 20 ns/1 instruction at 50 MIPS operation
• DSP
Processor: 24 bit × 24 bit + 51 bit multiplier and adder, 51 bit ALU
Data bus: 24 bit × 3
Data RAM: 12 k word
Coefficient ROM: 4 k word
Program ROM: 12 k word
Program RAM: 128 word
• MCU interface: Serial interface or I2C bus interface
• Others
It is possible to connect external RAM, 256 k or 1 M SRAM
External interruption input terminal
Flag input terminal: 4 inputs
General-purpose output port: 8 outputs (The ports can be used as interrupt outputs to MCU and logic control
outputs.)
incorrect operation detect
• Operating Voltage: 3.0 ± 0.3 V
• In CMOS structure and high-speed processing
• 100 pin flat package design
Note 1: “Dolby”, “Pro Logic”, and the double-D symbol are trademarks of Dolby Laboratories.
Note 2: “DTS” and “DTS Digital Surround” are registered trademarks of Digital Theater Systems, Inc.
Note 3: Since this product has a weak terminal in serge voltage, please advise handling it enough.
1 2005-09-28
http://www.Datasheet4U.com
1 page  
Pin
No.
Symbol
I/O
Description of Pin Functions
36 TSTSUB0
I Test sub input-0 (L: test, H: normal operation)
37 FCONT O Frequency control output for VCO circuit
38 TSTSUB1
I Test sub input-1 (L: test, H: normal operation)
39 TSTSUB2
40
41 V
42
PDO
DDA
PLON
43
44
45
46 V
47 CK
48 L
49 V
50
51
52
53 V
54
55
56
57
58
59
60
61
62 V
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
AMPI
AMPO
CKI
SSA
O
OCK
SS
WR
OE
CE
DD
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
SS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
VDD
AD8
AD9
AD10
AD11
AD12
AD13
I Test sub input-2 (L: test, H: normal operation)
O Phase detect signal output
⎯ Analog power supply
I Clock selection input (L: external clock, H: VCO clock)
I Amplifier input for Low pass filter
O Amplifier output for Low pass filter
I External clock input
⎯ A nalog ground
O DIR clock output
O VCO lock output
⎯ Digital ground
O Write signal output for external SRAM
O Enable signal output for external SRAM
O Chip enable signal output for external SRAM
⎯ Digital power supply
I/O Data I/O-7 for external SRAM
I/O Data I/O-6 for external SRAM
I/O Data I/O-5 for external SRAM
I/O Data I/O-4 for external SRAM
I/O Data I/O-3 for external SRAM
I/O Data I/O-2 for external SRAM
I/O Data I/O-1 for external SRAM
I/O Data I/O-0 for external SRAM
⎯ D igital ground
O Address output-0 for external SRAM
O Address output-1 for external SRAM
O Address output-2 for external SRAM
O Address output-3 for external SRAM
O Address output-4 for external SRAM
O Address output-5 for external SRAM
O Address output-6 for external SRAM
O Address output-7 for external SRAM
⎯ Digital power supply
O Address output-8 for external SRAM
O Address output-9 for external SRAM
O Address output-10 for external SRAM
O Address output-11 for external SRAM
O Address output-12 for external SRAM
O Address output-13 for external SRAM
5
TC9446FG
Remarks
Pull-up resistor,
Schmitt input
Tri-state output
Pull-up resistor,
Schmitt input
Pull-up resistor,
Schmitt input
Tri-state output
Pull-up resistor,
Schmitt input
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
Pull-up resistor
2005-09-28
5 Page 
TC9446FG
3) Read-out of 24 bit data
The number of words of data read while data required for the 16 bit address in a 24 bit command is
set up and R/W bit is set to “H”, when reading data of TC9446FG from a MCU during program
operation is set up.
And, after transmitting a 24 bit command, MIACK = “L” is checked and 24 bit data of the required
number of words is read.
MIACK = “L” is checked after command transmission for waiting to set data which should be read
to data buffer. The procedure of read-out of 24 bit data is shown in Figure 4.
MICS = “L”
Checking of MIACK = “L”
(waiting for becoming to MIACK = “L” at the MIACK = “H”)
Write of 24 bit command
(read of data = xxxx1xh)
Checking of MIACK = “L”
(waiting for becoming to MIACK = “L” at the MIACK = “H”)
A 16 bit address and a transmission word
number are set up.
Read of 24 bit data (1)
Read of 24 bit data (2)
It is possible to read out the 24 bit data
until 16 word maximum.
Read of 24 bit data (n)
MICS = “H”
It finished to read of the data
Figure 4 Procedure of Read-Out of 24 Bit Data
11 2005-09-28
11 Page | ||
| Páginas | Total 41 Páginas | |
| PDF Descargar | [ Datasheet TC9446FG.PDF ] | |
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