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PDF 24C640-IST Data sheet ( Hoja de datos )
| Número de pieza | 24C640-IST | |
| Descripción | 64K SPI Bus Serial EEPROM | |
| Fabricantes | MicrochipTechnology | |
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M 25AA640/25LC640/25C640
64K SPI™ Bus Serial EEPROM
DEVICE SELECTION TABLE
Part
Number
25AA640
25LC640
25C640
VCC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max Clock
Frequency
1 MHz
2 MHz
3 MHz
Temp
Ranges
C,I
C,I
C,I,E
FEATURES
• Low power CMOS technology
- Write current: 3 mA typical
- Read current: 500 µA typical
- Standby current: 500 nA typical
• 8192 x 8 bit organization
• 32 byte page
• Write cycle time: 5ms max.
• Self-timed ERASE and WRITE cycles
• Block write protection
- Protect none, 1/4, 1/2, or all of array
• Built-in write protection
- Power on/off data protection circuitry
- Write enable latch
- Write protect pin
• Sequential read
• High reliability
- Endurance: 1M cycles (guaranteed)
- Data retention: > 200 years
- ESD protection: > 4000 V
• 8-pin PDIP, SOIC, and TSSOP packages
• Temperature ranges supported:
- Commercial: (C)
- Industrial: (I)
- Automotive: (E) (25C640)
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
DESCRIPTION
The Microchip Technology Inc. 25AA640/25LC640/
25C640 (25xx640*) is a 64K bit serial Electrically Eras-
able PROM. The memory is accessed via a simple
Serial Peripheral Interface (SPI) compatible serial bus.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a chip select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
chip select, allowing the host to service higher priority
interrupts.
PACKAGE TYPES
PDIP/SOIC
CS 1
8 VCC
SO 2
7 HOLD
WP 3
6 SCK
VSS 4
5 SI
HOLD
VCC
CS
SO
TSSOP
18
27
36
45
SCK
SI
VSS
WP
BLOCK DIAGRAM
Status
Register
HV Generator
I/O Control
Logic
Memory
Control
Logic
X
Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
VCC
VSS
Y Decoder
Sense Amp.
R/W Control
*25xx640 is used in this document as a generic part number for the 25AA640/25LC640/25C640 devices.
SPI is a trademark of Motorola.
© 1997 Microchip Technology Inc.
Preliminary
DS21223A-page 1
1 page  
25AA640/25LC640/25C640
2.0 PIN DESCRIPTIONS
2.1 Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into standby mode.
However, a programming cycle which is already initi-
ated or in progress will be completed, regardless of the
CS input signal. If CS is brought high during a program
cycle, the device will go in standby mode as soon as
the programming cycle is complete. As soon as the
device is deselected, SO goes to the high impedance
state, allowing multiple parts to share the same SPI
bus. A low to high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a high to low transition on CS is required prior to
any sequence being initiated.
2.2 Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses, and data. Data is
latched on the rising edge of the serial clock.
2.3 Serial Output (SO)
The SO pin is used to transfer data out of the 25xx640.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
2.4 Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 25xx640. Instructions,
addresses, or data present on the SI pin are latched
on the rising edge of the clock input, while data on the
SO pin is updated after the falling edge of the clock
input.
2.5 Write Protect (WP)
This pin is used in conjunction with the WPEN bit in the
status register to prohibit writes to the non-volatile bits
in the status register. When WP is low and WPEN is
high, writing to the non-volatile bits in the status regis-
ter is disabled. All other operations function normally.
When WP is high, all functions, including writes to the
non-volatile bits in the status register operate normally.
If the WPEN bit is set, WP low during a status register
write sequence will disable writing to the status regis-
ter. If an internal write cycle has already begun, WP
going low will have no effect on the write.
The WP pin function is blocked when the WPEN bit in
the status register is low. This allows the user to install
the 25AA640/25LC640/25C640 in a system with WP
pin grounded and still be able to write to the status reg-
ister. The WP pin functions will be enabled when the
WPEN bit is set high.
2.6 Hold (HOLD)
The HOLD pin is used to suspend transmission to the
25xx640 while in the middle of a serial sequence with-
out having to re-transmit the entire sequence over at a
later time. It must be held high any time this function is
not being used. Once the device is selected and a
serial sequence is underway, the HOLD pin may be
pulled low to pause further serial communication with-
out resetting the serial sequence. The HOLD pin must
be brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high to
low transition. The 25xx640 must remain selected dur-
ing this sequence. The SI, SCK, and SO pins are in a
high impedance state during the time the part is
paused and transitions on these pins will be ignored.
To resume serial communication, HOLD must be
brought high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
© 1997 Microchip Technology Inc.
Preliminary
DS21223A-page 5
5 Page 
25AA640/25LC640/25C640
25AA640/25LC640/25C640 PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
25xx640 —
/P
Package:
P = Plastic DIP (300 mil Body), 8-lead
SN = Plastic SOIC (150 mil Body), 8-lead
ST = TSSOP, 8-lead
Temperature
Range:
Blank = 0°C to +70°C
I = –40°C to +85°C
E = –40°C to +125°C
Devices:
25AA640
25AA640T
25AA640X
25AA640XT
25LC640
25LC640T
25LC640X
25LC640XT
25C640
25C640T
25C640X
25C640XT
64K bit 1.8V SPI Serial EEPROM
64K bit 1.8V SPI Serial EEPROM Tape and Reel
64K bit 1.8V SPI Serial EEPROM
in alternate pinout (ST only)
64K bit 1.8V SPI Serial EEPROM
in alternate pinout Tape and Reel (ST only)
64K bit 2.5V SPI Serial EEPROM
64K bit 2.5V SPI Serial EEPROM Tape and Reel
64K bit 2.5V SPI Serial EEPROM
in alternate pinout (ST only)
64K bit 2.5V SPI Serial EEPROM
in alternate pinout Tape and Reel (ST only)
64K bit 5.0V SPI Serial EEPROM
64K bit 5.0V SPI Serial EEPROM Tape and Reel
64K bit 5.0V SPI Serial EEPROM
in alternate pinout (ST only)
64K bit 5.0V SPI Serial EEPROM
in alternate pinout Tape and Reel (ST only)
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office.
2. The Microchip Corporate Literature Center U.S. FAX: (602) 786-7277.
3. The Microchip’s Bulletin Board, via your local CompuServe number (CompuServe membership NOT required).
© 1997 Microchip Technology Inc.
Preliminary
DS21223A-page 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 24C640-IST.PDF ] | |
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