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PDF BA1117FP Data sheet ( Hoja de datos )
| Número de pieza | BA1117FP | |
| Descripción | Low drop adjustable positive voltage regulator | |
| Fabricantes | ROHM Semiconductor | |
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Low drop adjustable
positive voltage regulator
BA1117FP
●Features
Low dropout voltage:
- 1.2 V typ. (at IO = 1 A, 25℃)
Output current up to 1 A
Adjustable version availability (VREF = 1.25 V)
Internal current and thermal limit
Available in ±1% (at 25℃) and 2% in full
temperature range
High supply voltage rejection:
- 75 dB typ. (at 25℃)
Temperature range: -20℃ to 105℃
Designed to use by ceramic capacitors
TO252-3
●Typical Application
TO220-3
●Description
The BA1117FP is a low drop voltage regulator
able to provide up to 1 A of output current,
available in adjustable versions (VREF =1.25V).
The device is supplied in: TO252-3 and TO220-3.
Surface mounted packages optimize the
thermal characteristics while offering a relevant
space saving advantage. High efficiency is
assured by NPN pass transistor. Only a very
common 22uF minimum capacitor is needed for
stability. Chip trimming allows the regulator to
reach a very tight reference voltage tolerance, within
±1% at 25℃.
10uF
VIN VOUT
ADJ
V REF
R1
IADJ
R2
22uF
VREF = 1.25 V (Typ.)
IADJ = 60 uA (Typ.)
VO = VREF × (1 + R2 / R1 ) + IADJ × R2
Table1. Device summary
Order codes
TO252-3
TO220-3
BA1117FP-E2
Under development
Output voltage
Adjustable from 1.25 V
○Product structure：Silicon monolithic integrated circuit
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111･14･001
○This product is not designed protection against radioactive rays.
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1 page  
BA1117FP
●Electrical characteristics
Datasheet
Refer to the test circuits, TJ = -20 to 105℃, CO = 22 uF, CI = 10 uF, unless otherwise specified.
Table 4. Electrical characteristics of BA1117 (Adjustable)
Symbol
Parameter
Test conditions
VO Reference Voltage
VI = 5.3 V, IO = 10 mA, TJ = 25℃
VO Reference Voltage
IO = 10 mA to 1 A, VI = 2.75 to 10 V
⊿VO
Line regulation
VI = 2.75 V to 8 V, IO = 0 mA
⊿VO
Load regulation
VI = 2.75 V, IO = 0 to 1A
⊿VO
Temperature stability
⊿VO
Long term stability
1000hrs, TJ = 105℃
Min.
1.238
1.225
Typ.
1.250
1
1
0.5
0.3
Max.
1.262
1.27
6
10
VI
IADJ
⊿IADJ
IO(min)
IO
eN
SVR
Operating input voltage IO = 100mA
Adjustment Pin Current
Adjustment Pin Current
Change
VI ≦ 10 V
VI - VO =1.4 to 10 V, IO = 10 mA to 1 A
Minimum Load Current
VI = 10 V
Output current
VI - VO = 5 V, TJ = 25℃
Output noise voltage
Supply voltage rejection
B = 10 Hz to 10 kHz, TJ = 25℃
IO = 40mA, f = 120 Hz
VI – VO = 3 V, Vripple = 1 VPP,
IO = 100 mA
1000
60
60
0.2
1.7
1700
100
75
1
10
120
5
5
1.10
VD Dropout voltage
IO = 500 mA
1.05 1.15
⊿VO(pwr) Thermal regulation
IO = 1 A
Ta = 25℃, 30 ms pulse
1.20 1.40
0.08 0.2
Unit
V
V
mV
mV
%
%
V
uA
uA
mA
mA
uV
dB
V
V
V
%/W
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
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TSZ02201-0RGR0A600450-1-2
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5 Page 
BA1117FP
Datasheet
(11). Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated.P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example, the relation between each potential is as follows:
When VO > Pin A and VO > Pin B, the P-N junction operates as a parasitic diode.
When VO > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC.
The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical
damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the
VO (P substrate) voltage to an input pin, should not be used.
Pin A
Resistor
Pin A
N
P+
N
Parasitic element
P P+
N
P substrate
VGOND
Transistor (NPN)
Pin B C B
E
Pin B
Parasitic
element
N P+
Parasitic element
N
P
P+
N
P substrate
VGOND
GND
BC
E
Parasitic
VOGND element
Other adjacent elements
(12). Ground Wiring Pattern.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to
change the GND wiring pattern of any external components, either.
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
11/12
TSZ02201-0RGR0A600450-1-2
18.Nov.2013 Rev.003
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet BA1117FP.PDF ] | |
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