DataSheet.es


PDF PC28F00AP30BFB Datasheet ( Hoja de datos )

Número de pieza PC28F00AP30BFB
Descripción Micron Parallel NOR Flash Embedded Memory (P30-65nm)
Fabricantes MICRON 
Logotipo MICRON Logotipo
Vista previa
Total 30 Páginas
		
PC28F00AP30BFB datasheet

1 Page

PC28F00AP30BFB pdf
512Mb, 1Gb, 2Gb: P30-65nm
Features
List of Figures
Figure 1: Easy BGA Block Diagram ................................................................................................................... 8
Figure 2: Memory Map – 512Mb and 1Gb ......................................................................................................... 9
Figure 3: Memory Map – 2Gb ......................................................................................................................... 10
Figure 4: 56-Pin TSOP – 14mm x 20mm .......................................................................................................... 11
Figure 5: 64-Ball Easy BGA – 8mm x 10mm x 1.2mm ....................................................................................... 12
Figure 6: 56-Lead TSOP Pinout – 512Mb and 1Gb ........................................................................................... 13
Figure 7: 64-Ball Easy BGA (Top View – Balls Down) – 512Mb, 1Gb, and 2Gb .................................................... 14
Figure 8: Example VPP Supply Connections .................................................................................................... 31
Figure 9: Block Locking State Diagram ........................................................................................................... 35
Figure 10: First Access Latency Count ............................................................................................................ 40
Figure 11: Example Latency Count Setting Using Code 3 ................................................................................. 41
Figure 12: End of Wordline Timing Diagram ................................................................................................... 41
Figure 13: OTP Register Map .......................................................................................................................... 46
Figure 14: Word Program Procedure ............................................................................................................... 62
Figure 15: Buffer Program Procedure .............................................................................................................. 63
Figure 16: Buffered Enhanced Factory Programming (BEFP) Procedure ........................................................... 64
Figure 17: Block Erase Procedure ................................................................................................................... 65
Figure 18: Program Suspend/Resume Procedure ............................................................................................ 66
Figure 19: Erase Suspend/Resume Procedure ................................................................................................. 67
Figure 20: Block Lock Operations Procedure ................................................................................................... 68
Figure 21: OTP Register Programming Procedure ............................................................................................ 69
Figure 22: Status Register Procedure .............................................................................................................. 70
Figure 23: Reset Operation Waveforms ........................................................................................................... 72
Figure 24: AC Input/Output Reference Timing ................................................................................................ 76
Figure 25: Transient Equivalent Load Circuit .................................................................................................. 76
Figure 26: Clock Input AC Waveform .............................................................................................................. 76
Figure 27: Asynchronous Single-Word Read (ADV# LOW) ................................................................................ 80
Figure 28: Asynchronous Single-Word Read (ADV# Latch) ............................................................................... 80
Figure 29: Asynchronous Page Mode Read ...................................................................................................... 81
Figure 30: Synchronous Single-Word Array or Nonarray Read .......................................................................... 82
Figure 31: Continuous Burst Read with Output Delay ..................................................................................... 83
Figure 32: Synchronous Burst Mode 4-Word Read ........................................................................................... 84
Figure 33: Write to Write Timing .................................................................................................................... 87
Figure 34: Asynchronous Read to Write Timing ............................................................................................... 87
Figure 35: Write to Asynchronous Read Timing ............................................................................................... 88
Figure 36: Synchronous Read to Write Timing ................................................................................................ 89
Figure 37: Write to Synchronous Read Timing ................................................................................................ 90
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

5 Page

PC28F00AP30BFB arduino
Package Dimensions
Figure 4: 56-Pin TSOP – 14mm x 20mm
512Mb, 1Gb, 2Gb: P30-65nm
Package Dimensions
Pin #1 index
See notes 2
See note 2
0.15 ±0.05
+2°
-3°
20 ±0.2
18.4 ±0.2
See note 2
See note 2
0.995 ±0.03
0.5 TYP
14.00 ±0.2
0.22 ±0.05
0.25 ±0.1
See Detail A
1.20 MAX
0.10
Seating
plane
0.05 MIN
0.60 ±0.10
Detail A
Notes:
1. All dimensions are in millimeters. Drawing not to scale.
2. One dimple on package denotes pin 1; if two dimples, then the larger dimple denotes
pin 1. Pin 1 will always be in the upper left corner of the package, in reference to the
product mark.
3. For the lead width value of 0.22 ±0.05, there is also a legacy value of 0.15 ±0.05.
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

11 Page





PáginasTotal 30 Páginas
PDF Descargar[ PC28F00AP30BFB.PDF ]

Enlace url


Hoja de datos destacado

Número de piezaDescripciónFabricantes
PC28F00AP30BFAMicron Parallel NOR Flash Embedded Memory (P30-65nm)MICRON
MICRON
PC28F00AP30BFBMicron Parallel NOR Flash Embedded Memory (P30-65nm)MICRON
MICRON
PC28F00AP30BFxMicron Parallel NOR Flash Embedded Memory (P30-65nm)MICRON
MICRON

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


Index : 0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z


www.DataSheet.es    |   2018   |  Privacy Policy  |  Contacto  |  Buscar