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PDF CAT874 Data sheet ( Hoja de datos )

Número de pieza CAT874
Descripción Smart Phone Battery Switch Controller
Fabricantes ON Semiconductor 
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CAT874
Smart Phone Battery Switch
Controller
Description
CAT874 is a switch controller designed to start/shut off smart
phones with the push button input or by phone microcontroller unit.
CAT874 monitors two inputs and outputs an active high output after
PWR_ON input has been active (logic low) for a factory preset
minimum time. Releasing input from its active state before the
minimum timeout period resets the internal timer and must return to
being active before the timer will restart with a fresh count down. The
output remains high until the next PWR_ON hightolow or VCHG
lowtohigh transition.
CAT874’s push pull output is capable of sinking up to 3 mA of
current.
Features
Operate on 1.8 V to 5.5 V Power Supplies
Ultra Low Quiescent Current: 100 nA (typical)
Schmitt Trigger Inputs
Small mLLGA6 Package: 1.45 x 1.0 x 0.4 mm
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Mobile Phones
PDAs
MP3 Players
Personal Navigation Devices
http://onsemi.com
1
ULLGA6
UL SUFFIX
CASE 613AF
MARKING DIAGRAM
XM
X = Specific Device Code
= ( = CAT874)
M = Date Code
“P” written at 180° clockwise rotation
PIN CONNECTIONS
PWR ON 1
VDD
VCHG
NIC
OUT
GND
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Figure 1. Application Schematic
© Semiconductor Components Industries, LLC, 2013
July, 2013 Rev. 1
1
Publication Order Number:
CAT874/D
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CAT874 pdf
CAT874
SYSTEM DESCRIPTION AND APPLICATIONS INFORMATION
General
CAT874 is designed for the manual switching of
microprocessors and microcontrollers. T
o prevent
accidental resets, CAT874 requires PWR_ON input be held
low for a prescribed period before an Active high output is
issued to the system processor.
PWR_ON and VCHG Inputs
PWR_ON and VCHG are Schmitt trigger CMOS inputs.
PWR_ON must go low and stay low for a predetermined
period (t LOW_DELAY) to generate an Active high on the
output.
VCHG is a standard CMOS input with internal pull down
resistor 200 kW to keep the input low when char ger is not
plugged in and PWR_ON is also a CMOS input with an
internal 200 kW pullup resistor, thus PWR_ON can be left
floating.
When PWR_ON goes low , an internal timing cycle is
initiated. If it goes high before the countdown timer has
concluded its cycle, the timer will reset and will restart from
the beginning when PWR_ON returns to being low.
Output (OUT)
CAT874 provides an activehigh push pull output. This
output will sink up to 3 mA.
Delay Timer Testing:
A user test mode is provided to reduce the system test time
after the CA T874 is mounted on the board. Instead of
waiting tLOW_DELAY for the output to go active.
The user brings PWR_ON low, and sends seven positive
edges on the VCHG pin in a window of timeStT. After a delay
tD, the device output will change state from low to high, and
will return to the low state only when there is a hightolow
transition on PWR_ON.
PWR_ON
V_CHG
OUT
12345
tP
67 8
tST
Figure 4. TOC Mode
tD
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