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Número de pieza FSFR2100US
Descripción Power Switch
Fabricantes Fairchild Semiconductor 
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FSFR2100US datasheet

1 Page

FSFR2100US pdf
Absolute Maximum Ratings (Continued)
Symbol P
arameter
MOSFET Section
VDGR
VGS
IDM
Drain Gate Voltage (RGS=1MΩ)
Gate Source (GND) Voltage
Drain Current Pulsed(5)
FSFR2100US/L
FSFR1800US/L
FSFR1700US/L
FSFR2100US/L TC=25°C
TC=100°C
ID
Continuous Drain Current FSFR1800US/L TC=25°C
TC=100°C
FSFR1700US/L TC=25°C
TC=100°C
Package Section
Torque Recommended Screw Torque
Notes:
5. Pulse width is limited by maximum junction temperature.
Min.
Max.
500
10.5
7.0
6.0
±30
32
23
20
6.5
4.5
3.9
5~7
Unit
V
V
A
A
kgf·cm
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol P
arameter
θJC
Junction-to-Case Center Thermal Impedance
(Both MOSFETs Conducting)
FSFR2100US/L
FSFR1800US/L
FSFR1700US/L
Value
10.44
10.68
10.79
Unit
ºC/W
© 2009 Fairchild Semiconductor Corporation
FSFR-US Series • Rev.1.0.2
5
www.fairchildsemi.com

5 Page

FSFR2100US arduino
Functional Description
1. B asic O peration: FSFR-US seri es i s d esigned t o
drive high-side and low-side MOSFETs complementarily
with 50% duty cy cle. A fix ed dead ti me of 3 50ns is
introduced between consecutive transitions, as shown in
Figure 15.
Figure 15. MOSFETs Gate Drive Signal
2. Internal O scillator: FS FR-US ser ies e mploys a
current-controlled oscillator, as s hown in Fig ure 16 .
Internally, the voltage of RT pin is regulated at 2V and the
charging / discharging current for the oscillator capacitor,
CT, is o btained by copying the curre nt flowing out of t he
RT pin ( ICTC) u sing a current mirr or. T herefore, th e
switching frequency increases as ICTC increases.
Figure 17. Resonant Converter Typical Gain Curve
Figure 16. Current Controlled Oscillator
Figure 18. Frequency Control Circuit
3. Frequen cy Setting : Figu re 17 s hows th e ty pical
voltage gain curv e of a r esonant converter, w here the
gain is inv ersely pro portional to the sw itching frequency
in t he ZVS r egion. T he o utput v oltage ca n be r egulated
by modulating the switching frequency. Figure 18 s hows
the ty pical circuit co nfiguration for th e R T pin, w here t he
opto-coupler tra nsistor is connected t o the R T pin to
modulate the switching frequency.
The minimum switching frequency is determined as:
f min 5.2kΩ 100(kHz)
Rmin
(1)
Assuming th e s aturation voltage of o pto-coupler
transistor i s 0.2V, the m aximum switching fr equency is
determined as:
fkmax =+(5.2kkΩΩ 4.68 ) ×100 ( Hz)
RmRin
max
(2)
To prevent ex cessive inrush curre nt an d ov ershoot of
output v oltage dur ing st artup, in crease the v oltage gain
of the re sonant converter progr essively. Si nce the
voltage gai n o f t he r esonant c onverter i s i nversely
proportional t o th e sw itching frequency, th e soft-start is
implemented by sweeping down the sw itching frequency
from an initial hi gh fr equency ( f IS S ) until the out put
voltage i s est ablished. T he s oft-start cir cuit is made by
connecting R -C series n etwork on t he R T p in, as s hown
in F igure 1 8. FSFR-US series al so ha s a n internal s oft-
start f or 3m s to r educe th e c urrent ov ershoot dur ing t he
initial cycles, which adds 40kHz to the initial frequency of
the external soft-start circuit, as shown in Figur e 19. T he
initial frequency of the soft-start is given as:
f ISS = (5.2kΩ + 5.2kΩ ) ×100 + 40 (kHz)
Rmin
RSS
(3)
© 2009 Fairchild Semiconductor Corporation
FSFR-US Series • Rev.1.0.2
10
www.fairchildsemi.com

10 Page





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