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PDF AK2346B Data sheet ( Hoja de datos )

Número de pieza AK2346B
Descripción Two-way Radio Audio Processor
Fabricantes AKM 
Logotipo AKM Logotipo



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No Preview Available ! AK2346B Hoja de datos, Descripción, Manual

ASAHI KASEI
[AK2346B]
AK2346B
Two-way Radio Audio Processor
1. Features
• Audio processing
• TX and RX amplifier
• Pre/De-emphasis circuit
• Compressor and Expander with no external components
• Scrambler and De-scrambler in frequency inversion type
• Limiter with level adjuster
• Splatter filter for wide and narrow band
• Digital controlled amplifier for microphone, modulator and demodulator sensitivity
• 1200/2400bps MSK MODEM with frame detection
• Wide range operation voltage: 1.9V to 5.5V, temperature: -30 to 75 °C
• Oscillator circuit for 3.6864MHz crystal
• Serial control interface operation
• Compact plastic packaging, 24-pin SSOP
2. Description
AK2346B includes audio filter, limiter, splatter filter, COMPANDOR, scrambler, MSK MODEM, which
is highly integrated two-way radio baseband functions for FRS and LMR.
Audio high-pass filter shows a high attenuation in magnitude response characteristics under 250Hz
that supports to eliminate a subaudio tone clearly.
TX limiter for deviation control has a limiting level adjuster by applying a DC voltage via external
components. Splatter filter has the magnitude response for narrowband(fc=2.55kHz) and
wideband(3.0kHz) to meet various regulatory agencies in the world wide.
COMPANDOR is no adjustment type because it includes all parametric components inside the chip.
Scrambler circuit is composed of frequency inversion circuit by double balanced mixer that has
3.388kHz carrier clock.
MSK MODEM for data communication can be chosen either 2400bps or 1200bps. 2400bps data rate
provides a high speed data transmission and 1200bps supports a low BER(bit error rate) performance
that is suitable for under weak electrical field condition application.
There are four signal level adjusters for microphone, modulator and demodulator sensitivity by digital
controlled amplifier (volume).
• Pin Assignment
MS1409-E-00
AGNDIN
AGND
TXIN
TXINO
L IM LV
EXTLIMIN
MOD
VSS
TCLK
T D ATA
DI/O
RDF/FD
1
2
3
4
5
6
7
8
9
10
11
12
-1-
24 TEST
23 RXI N
22 RXI NO
21 RXL PFO
20 RXA F
19 RXA FIN
18 EXPO UT
17 VDD
16 XIN
15 XO UT
14 DI R
13 SCL K
2 012/05
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AK2346B pdf
ASAHI KASEI
[AK2346B]
Block Description
AGND
OSC
Control
Register
The circuit to generate the reference voltage (1/2VDD) for internal analog signal.
The circuit to oscillate the 3.6864MHz reference clock with an external crystal oscillator
and resistor and capacitors.
The control register controls the status of internal switches and digitally controlled
amplifiers of IC by serial data that consists of 3 address bits and 8 data bits. At the start
up a power-on-reset circuit works and “Reset” data are set to the control register. (Refer
to the control register map)
The data buffer stores 8 bits of the MSK received data to smooth the signal interface with
microprocessor.
6. Pin/Function
Package
Signal
Pin No Name Type
1 AG NDIN
I
2 AG ND
3 TX IN
4 TXINO
5 LIM LV
6 EXTLIMIN
7 MOD
8 VS S
9 TC LK
10 TD ATA
11 DI/O
O
I
O
I
I
O
PWR
O
I
I/O
12 RD F/FD
O
Function
Analog ground input pin.
Connect the capacitor to stabilize the analog ground level. This pin also has
reset function for the registers. Connecting to the low level, “Reset” data are set
to the control register.
Analog ground output pin.
Connect the capacitor to stabilize the analog ground level.
Transmit audio signal input pin.
This is the inverting input pin for TXA1. It composes a microphone amplifier with
an external resister and capacitor.
TXA1 feedback output pin.
Limit level adjuster pin.
A limit level can be adjusted by applying a DC voltage to this pin. If it is open,
the level is fixed to a predetermined level.
External signal input pin pre-limiter circuit.
This pin is available for external tone signal.
The modulated transmit signal output pin.
Load impedance larger than 10kΩ can be drive.
Negative power supply pin.
Normally supply 0V to this pin.
Clock output pin for MSK transmission data.
Setting the register named TXSW2 to “0” puts out 1.2/2.4kHz clock. If the
register is set to “1”, it goes to High level.
MSK transmission data input pin.
Data are latched synchronizing with the TCLK rising edge.
Serial data input and output pin.
Input for register setting data and output for MSK receive data.
MSK signal received flag and frame detection signal output pin.
This pin puts out two types of signal that depends on the status of register
named FSL.
In case FSL equal “1”, it is received flag mode (RDF). So the pin puts out low
level after 8 bits of MSK receive signal have been written to the internal register.
In case FSL equal “0”, it is frame detection mode (FD). So the low pulse is put
out after a frame pattern is detected.
MS1409-E-00
-5-
2 012/05

5 Page





AK2346B arduino
ASAHI KASEI
Audio path frequency response (Emphasis:off)
[AK2346B]
20
10
0
-10
-20
-30
-40
-50
-60
1.E+02
1.E+03
FREQUENCY(Hz)
1.E+04
Figure 1: TX overall response without pre-emphasis.
SPL=0
SPL=1
20
10
0
-10
-20
-30
-40
-50
-60
1.E+02
1.E+03
FREQUENCY(Hz)
1.E+04
Figure 2: RX overall response without de-emphasis.
MS1409-E-00
- 11 -
2 012/05

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