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PDF EP9851 Data sheet ( Hoja de datos )
| Número de pieza | EP9851 | |
| Descripción | Single Port HDMI 1.2a Receiver | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de EP9851 (archivo pdf) en la parte inferior de esta página. Total 34 Páginas | ||
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User Guide — EP9851_UG V0.3
Single Port HDMI 1.2a Receiver with Analogue Video Output
EP9851
User Guide
V0.3
Revised Date: Jun. 14, 2007
Original Release Date: Nov. 08, 2006
Explore
Explore reserves the right to make changes without further notice to any products herein to improve reliability, function or design.
Explore does not a ssume any li ability arising out of the ap plication or use o f any product or circuit described herein; neither does it
convey any license under its patent rights nor the rights of others. Explore products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any
other application in which the failure of the Explore product could create a situation where personal injury or death may occur. Should
Buyer purchase or use Explore products for any suc h unintended or unauthorized application, Buyer shall indemnify and hold Explore
and its officers, employees, subsidiaries, af filiates, and distributors ha rmless a gainst all cl aims, co sts, d amages, a nd ex penses, an d
reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Explore was negligent regarding the design or manufacture of the part.
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
1
http://www.Datasheet4U.com
1 page  
Section 2 Overview
2.1 Block Diagram
Figure 2-1 Block Diagram
HDMI SCL
_INTb SDA
User Guide — EP9851_UG V0.3
EE_SCL
EE_SDA
HDMI
Port
External
EEPROM
Interface
HDMI
Receiver
DDC
HDMI Registers
and
Control Logic
HDCP Keys
Video
Decode
HDCP
Engine
Audio Buffer
Audio
Decode
PLL
RGB/YUV
DAC Out
PLL
IIS
Audio Out
SPDIF
Audio Out
DAC0
DAC1
DAC2
H, V
MCLK
IIS_SCK
IIS_WS
IIS_SD
SPDIF
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
5
5 Page 
User Guide — EP9851_UG V0.3
Video AC Specifications (under normal operating conditions unless otherwise specified)
Symbol
TDPS
TCCS
TIJIT
Parameter
Intra-Pair (+ to -) Differential Input Skew
Channel to Channel Differential Input Skew
Differential Input Clock Jitter Tolerance
Conditions
Min Typ
Max Units
0.4 Tbit
1.0 Tpixel
0.3 Tbit
I2S Audio AC Specifications (under normal operating conditions unless otherwise specified)
Symbol
Tsck
Tsck_d
Tsck_h
Tsck_l
Tiis_s
Tiis_h
Parameter
SCK Clock Period
SCK Clock Duty Cycle
SCK Clock High Time
SCK Clock LOW Time
SCK to SD and WS (Setup Time)
SCK to SD and WS (Hold Time)
Conditions
CL = 10pF
CL = 10pF
CL = 10pF
CL = 10pF
CL = 10pF
CL = 10pF
Min Typ
1
40%
40%
40%
40%
40%
Max
60%
60%
60%
-
-
Units
Tsck
Tsck
Tsck
Tsck
Tsck
Tsck
SPDIF Audio AC Specifications (under normal operating conditions unless otherwise specified)
Symbol
Tspdif
Tspdif_d
Parameter
SPDIF Cycle Time
SPDIF Duty Cycle
Conditions
CL = 10pF
CL = 10pF
Min Typ Max Units
1 UI
90%
110%
UI
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
11
11 Page | ||
| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet EP9851.PDF ] | |
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