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PDF PBL3726-18A Data sheet ( Hoja de datos )
| Número de pieza | PBL3726-18A | |
| Descripción | Universal Speech Circuit | |
| Fabricantes | Ericsson | |
| Logotipo |  |
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March 1996
PBL 3726/18A
Universal Speech Circuit
Description
PBL 3726/18A is a standard version of the PBL 3726 family of the mask-program-
mable, monolithic integrated speech circuits for use in electronic telephones.
It is designed for use with a low impedance microphone. Transmitting and receiv-
ing gain is regulated with line length. Different regulation for various current feeds
can be set by external resistors. Typical current feeds as 48 V, 2 x 200 ohm, 48 V
2 x 400 ohm and 48 V 2 x 800 ohm can be handled. Application dependent param-
eters such as line balance, side tone level, amplification and frequency response are
set by external components. Parameters are set independently which means easy
adoption for various market needs.
DTMF
input
10
AD
12
13 AM
DC
89 7
DC output for external
CMOS device
Sense Input
Control output
Mute
(active low)
5
1
PBL 3726/18
AT AR
17
18
6 5 11 3
2
24
15 16
+
14 4
3
1
Telephone
line
Key Features
• Minimum number of inexpensive
external components, 7 capacitors
and 11 resistors.
• Mute function for operation with
DTMF-generator.
• Transmit and receive gain regulation
for automatic loop loss compensa-
tion.
• Extended current and voltage range
5 - 130 mA, down to 2 V.
• Differential microphone input for
good balance to ground.
• Balanced receiver output stage.
• Short start-up time.
• Stabilized DC-supply for low current
CMOS diallers and/or electret
microphones.
• DTMF-input controlled by mute.
1 Impedance to line and radio interference suppression.
2 Transmit gain and frequency response network.
3 Receive gain and frequency response network.
4 Side tone balance network.
5 DC-supply components.
Figure 1. Functional diagram. DIP package.
18-pin plastic DIP
20-pin plastic SO
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1 page  
PBL 3726/18A
Functional Description
General
The gain of the transmitting and
receiving amplifiers are continuously
and equally changed with the line
length. The starting point for the gain
regulation is externally set. The gain
regulation can be cut-off externally, see
table under gain regulation below.
The outputs of the transmitting and
receiving amplifiers have internal
limitations of the output amplitudes.
The circuit includes a temperature
independent voltage reference used for
regulation of the DC line voltage, DC-
supply for external use and for the
transmitting and receiving gain
regulation. The DC line voltage is very
fast settled to its final value with a
minimum of overshoot.
The circuit uses a minimum of
external components. In a normal
practical case only 7 external capaci-
tors of which only two are electrolytic/
tantalum filter capacitor. One of the
other capacitors is needed as radio
interference suppression capacitor
over the line, one capacitor in the side-
tone balancing network and one
capacitor for low frequency cut-off in
each of the transmitting and receiving
amplifiers. The frequency response is,
except for that, flat for both amplifiers.
The circuit will with external compo-
nents get a very good return loss
behaviour, both against purely resistive
lines as for instance 600 ohm and
against complex networks as 900 ohm
in parallel with 30 nF.
+ Line
1
AM 2 AT
3
- Line
Mute
Transmitting
cut off
4
Figure 6. Block interconnections.
AR
1.2V +
-
15kΩ
15kΩ
1 +Line
8 0-470Ω
V DC 1
9
0-470Ω
V
DC
2
7 RDC1 +
+
14 RDC2
4.7-47
µF
Figure 7. DC regulator for external CMOS devices. 18-pin DIP pin numbers.
KEYPAD
11 2 33
4 56
7 89
0#
DTMF
output
DTMF
dialer
(CMOS type)
DC
Mute
out
GND
1
220 nF
10
12
13
AD
AM
PBL 3726/18
AT AR
DC
897
6 5 11 3
2
15 16
Sense Input
Control output
R1 ∞
47 µF
∞R2
R4
18 k
R5
22 k
100 nF
C3
R6
75 Ω
R7
910 Ω
C6
47 nF
6k2
R8
560 Ω
R11
R13 R15
R9
11 k
C5
100 nF 11 k 10 Ω
17
18
+
14 4
R10
62 k 910 Ω R3
C1
47 µF
C2
15 nF
Uz = 12 V
Telephone
line
10 Ω
Figure 8. Typical tone dialling telephone. Pinning DIP package.
5
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PBL3726-18A.PDF ] | |
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