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PDF FSL206MR Data sheet ( Hoja de datos )
| Número de pieza | FSL206MR | |
| Descripción | Green Mode Fairchild Power Switch | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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September 2012
FSL206MR
Green Mode Fairchild Power Switch (FPS™)
Features
Internal Avalanche-Rugged SenseFET: 650V
Precision Fixed Operating Frequency: 67kHz
No-Load <150mW at 265VAC without Bias Winding;
<25mW with Bias Winding for FSL206MR, <30mW
with Bias Winding for FSL206MRBN
No Need for Auxiliary Bias Winding
Frequency Modulation for Attenuating EMI
Line Under-Voltage Protection (LUVP)
Pulse-by-Pulse Current Limiting
Low Under-Voltage Lockout (UVLO)
Ultra-Low Operating Current: 300µA
Built-In Soft-Start and Startup Circuit
Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown
(TSD), Abnormal Over-Current Protection (AOCP)
Auto-Restart Mode for All Protections
Applications
SMPS for STB, DVD, and DVCD Player
SMPS for Auxiliary Power
Description
The FSL206MR integrated Pulse-Width Modulator
(PWM) and SenseFET is specifically designed for high-
performance offline Switched-Mode Power Supplies
(SMPS) while minimizing external components. This
device integrates high-voltage power regulators that
combine an avalanche-rugged SenseFET with a
Current-Mode PWM control block.
The integrated PWM controller includes: a 7.8V
regulator, eliminating the need for auxilliary bias
winding; Under-Voltage Lockout (UVLO) protection;
Leading-Edge Blanking (LEB); an optimized gate turn-
on/turn-off driver; EMI attenuator; Thermal Shutdown
(TSD) protection; temperature-compensated precision
current sources for loop compensation; soft-start during
startup; and fault-protection circuitry such as Overload
Protection (OLP), Over-Voltage Protection (OVP),
Abnormal Over-Current Protection (AOCP), and Line
Under-Voltage Protection (LUVP).
The internal high-voltage startup switch and the Burst-
Mode operation with very low operating current reduce
the power loss in Standby Mode. As a result, it is
possible to reach a power loss of 150mW with no bias
winding and 25mW (for FSL206MR) or 30mW (for
FSL206MRBN) with a bias winding under no-load
conditions when the input voltage is 265VAC.
Related Resources
Fairchild Power Supply WebDesigner – Flyback
Design and Simulation – In Minutes at No Expense
AN-4137 — Design Guidelines for Offline Flyback
Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback
Applications
AN-4147 — Design Guidelines for RCD Snubber of
Flyback
AN-4150 — Design Guidelines for Flyback
Converters Using FSQ-Series Fairchild Power
Switch (FPS™)
© 2011 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.5
www.fairchildsemi.com
Free Datasheet http://www.Datasheet4U.com
1 page  
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol
Parameter
Condition
SenseFET Section
BVDSS Drain-Source Breakdown Voltage
IDSS Zero Gate Voltage Drain Current
RDS(ON)
CiSS
COSS
CRSS
tr
tf
Drain-Source On-State Resistance(9)
Input Capacitances
Output Capacitance
Reverse Transfer Capacitance
Rise Time
Fall Time
Control Section
fOSC
∆fOSC
fM
DMAX
DMIN
VSTART
VSTOP
IFB
tS/S
Switching Frequency
Switching Frequency Variation
Frequency Modulation(8)
Maximum Duty Cycle
Minimum Duty Cycle
UVLO Threshold Voltage
Feedback Source Current
Internal Soft-Start Time
Burst Mode Section
VBURH Burst-Mode HIGH Threshold Voltage
VBURL Burst-Mode LOW Threshold Voltage
HYSBUR Burst-Mode Hysteresis
VCC = 0V, ID = 250µA
VDS = 650V, VGS = 0V
VDS = 520V, VGS = 0V, TA = 125°C(8)
VGS = 10V, ID = 0.3A
VGS = 0V, VDS = 25V, f = 1MHz
VGS = 0V, VDS = 25V, f = 1MHz
VGS = 0V, VDS = 25V, f = 1MHz
VDS = 325V, ID = 0.5A, RG = 25Ω
VDS = 325V, ID = 0.5A, RG = 25Ω
VFB = 4V, VCC = 10V
-25°C < TJ < 85°C
VFB = 4V, VCC = 10V
VFB = 0V, VCC = 10V
VFB = 0V, VCC Sweep
After Turn On
VFB= 0V, VCC = 10V
VFB = 4V, VCC = 10V
VCC = 10V,
VFB Increase
VCC = 10V,
VFB Decrease
FSL206MR
FSL206MRB
FSL206MR
FSL206MRB
FSL206MR
FSL206MRB
Protection Section
ILIM
tCLD
VSD
IDELAY
tLEB
VAOCP
VOVP
VLS_OFF
VLS_ON
TSD
HYSTSD
Peak Current Limit
Current Limit Delay(8)
Shutdown Feedback Voltage
Shutdown Delay Current
Leading-Edge Blanking Time(8)
Abnormal Over-Current Protection(8)
Over-Voltage Protection
Line-Sense Protection On to Off
Line-Sense Protection Off to On
Thermal Shutdown Temperature(8)
TSD Hysteresis Temperature(8)
VFB = 4V, di/dt = 300mA/µs,
VCC = 10V
VCC = 10V
VFB = 4V
VFB = 4V, VCC Increase
VFB = 3V, VCC = 10V, VLS Decrease
VFB = 3V, VCC = 10V, VLS Increase
Min.
650
61
66
0
7
6
90
10
0.66
0.40
0.59
0.28
0.54
4.5
2.1
250
23.0
1.9
1.4
125
Typ. Max.
50
250
14 19
162
14.9
2.7
6.1
43.6
67 73
±5 ±10
±3
72 78
00
89
78
110 130
15 20
0.83 1.00
0.50 0.60
0.74 0.89
0.35 0.42
90
150
0.60 0.66
100
5.0 5.5
2.7 3.3
0.7
24.5 26.0
2.0 2.1
1.5 1.6
135 150
60
Unit
V
µA
µA
Ω
pF
pF
pF
ns
ns
KHz
%
KHz
%
%
V
V
µA
ms
V
V
V
V
mV
mV
A
ns
V
µA
ns
V
V
V
V
°C
°C
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.5
5
www.fairchildsemi.com
Free Datasheet http://www.Datasheet4U.com
5 Page 
Line Under-Voltage Protection (LUVP)
If the input voltage of the converter is lower than the
minimum operating voltage, the converter input current
increases too much, causing components failure. If the
input voltage is low, the converter should be protected.
In the FSL206MR, the LUVP circuit senses the input
voltage using the LS pin and, if this voltage is lower than
1.5V, the LUVP signal is generated. The comparator
has 0.5V hysteresis. If the LUVP signal is generated, the
output drive block is shut down and the output voltage
feedback loop is saturated.
Burst Operation
To minimize power dissipation in Standby Mode, the
FPS enters Burst Mode. As the load decreases, the
feedback voltage decreases. As shown in Figure 23, the
device automatically enters Burst Mode when the
feedback voltage drops below VBURH. Switching
continues until the feedback voltage drops below VBURL.
At this point, switching stops and the output voltages
start to drop at a rate dependent on the standby current
load. This causes the feedback voltage to rise. Once it
passes VBURH, switching resumes. The feedback voltage
then falls and the process repeats. Burst Mode
alternately enables and disables switching of the
SenseFET and reduces switching loss in Standby Mode.
VO
Voset
Figure 21. Line UVP Circuit
Soft-Start
The FSL206MR has an internal soft-start circuit that
slowly increases the feedback voltage, together with the
SenseFET current, after it starts. The typical soft-start
time is 15ms, as shown in Figure 22, where progressive
increments of the SenseFET current are allowed during
the startup phase. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps prevent transformer saturation and reduce
the stress on the secondary diode.
VFB
VBURH
VBURL
IDS
VDS
Switching
disabled
t1
Switching
t2 t3 disabled
t4
time
Figure 23. Burst-Mode Operation
Figure 22. Internal Soft-Start
© 2011 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.5
11
www.fairchildsemi.com
Free Datasheet http://www.Datasheet4U.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet FSL206MR.PDF ] | |
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