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AD516 Función - (AD513 / AD516) HIGH SPEED FET-INPUT OP AMPS - ETC

Número de pieza AD516
Descripción (AD513 / AD516) HIGH SPEED FET-INPUT OP AMPS
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AD516 Hoja de datos, Descripción, Manual
HIGH SPEEDFET-INPUTOP AMPS
AD513,AD516
GENERALDESCRDnnON
The AD513 and AD516 high speedFET op amps combine
high DC accuracy with excellent dynamic response by utilizing
PIN CONFIGURATION
Top View
the flexibility of exrernal compensation. With simple lag com-
pensation, the AD513 and AD516 achieve slew rate of
20V/J.!Sec, and gain bandwidth of IMHz at unity. gain and
TYPICAL COM~ENSATING
SCHEMES
10MHz for gains greater than 100. With feedforward compen-
c,
sation a.slew rate of 50VIJ.lSec and gain bandwidth of 30MHz
can be achieved. High accuracy DC specifications includernax
R,
bias current as low as 20pA, a minimum gain of 50,000, and
CMRR of 80dB.
The AD513 is suggested for all general purpose FET input am-
plifier requirements where low cost and frequency response
flexibility are of prime importance. The AD516, with specifi-
Ro
TO-99
Offset Nulling
Scheme
~15M"
cations otherwise similar to the AD513, offers significant im-
provement in offset voltage by supplementing the AD513
f:~confIgUration with internal laser trimming of thin fIlm re-
sistors to provide typical offset voltages below 1mV.
The devices are also fully shorr circuit protected and can be
exrernally offset voltage nulled. All the circuits are supplied in
Othe TO-99 package in the same pin configuration as the
ADI0IA and ADI081108A. The AD513J/AD516J and
BAD513K/AD516K are specified for 0 to +70°C temperature
Sr-a5~5e Cotpoer+a1ti2o5~; Ct.he AD513S/AD516S for operation from
C3 c,
'Vs
Gain (Inv)
R, (Q)
R2 (.n)
C, (pF)
C2 (pF)
C3 (pF)
BW (kHz)
Slew Rate (V/,us)
1
10k
lOk
30
0
0
1000
5
1
10k
lOk
1
12
150
1000
50
10
10k
lOOk
8
0
0
500
20
10
1k
10k
1
12
0
1000
30
10
1k
10k
0
8
150
1000
50
100
1k
lOOk
1
0
0
100
6
100
100
10k
0
39
0
300
15
OELECTRICAL SPECIFICATIONS (Typical @ +25°C and.:t15VDC unless otherwise specified.)
LPar2melcr
ADS13J/ADSl6J
ADS13K/ADSI6K
ADS 13S/ADSI6S
EOpen Loop Gain (Note 1)
VOUT = !IOV, RL ?o2kQ
TA = min to nux
TEOutput CharacteriStics
20.000 min
IS,OOO miD
SO,OOOmin
40,000 miD
SO,OOOmiD
40,000 min
Voltage at RL = 2kQ. TA = min to nux
HOV miD
at RL = IOkn,TA =mintomax
!12V miD
Load Capacitance, Unity Gain (Note 2)
I OOOpI'
Short c.irclIit c.urtenr
2SmA
Frequency Response
Unity Gain, Small Signal (Fecdforward)
Slew Rate, Unity Gain (Fecdforward)
Input Offset Voltage (Note 3)
vs TemperatUre, T A = min to max
vs Supply, T A = min to nux
1Mllz
SOVljlSec
SOmV nux/3.5mV max
7Sp.Vt"e max
300p.V IV max
20mV maxll.SmV max
2Sp.V t" e max
200p.V/V max
20m V maxll.5mV
50p.Vt"C max
200p.V/V max
max
Input Bias Current
Either Input (Note 4)
30pA max
20pA max
20pA max
Input Impedance
Differemial
Common Mode
Input Noise
Voltage, O.IHz to 10Hz
SHz to SOkHz
f = 1kHz (spot noise)
10' I QI12pl'
1O"QII2£F
ISjlV (p-p)'
Sp.V (rms)
2SnV/VHz
Input Volrage Range
Differential
Common Mode, T A = min to max
Common Mode Rejection. V;" = ~IOV
~2Vs
~IOV miD
70dB min
Power Supply
Rated Performance
Operating
Quiescent Current
~ISV
~(S to 18)V
7mA max
TemperatUre
Operating,
Stor~e
Price
(1-24)
(2S-99)
(100-99\1)
Rated Performance
0 to +70"e
-6S"e to +Iso"e
SI 1.00/S13.00
S9.00/S11.00
S7.50/S9.50
SI3.50/S1S.50
SIO.80/S12.80
S9.00/SII.00
-S5"e to +125"e
S21.00/S26.50
SI6.80/S21.80
SI4.00/S17.60
NOTES,
I. Open Loop Gain is specified with Vos both nulled and unDulled.
.Specifications same as for ADS\3J.
2. A conservative design would not exceed S.oOpF of load capacitance.
3. Input Offset Voltage spe~ifications
are guaranteed after S minutes of operation at T A = +2SoC.
4. Bias Current specifications are guaranteed after S minutes of operation at T A = +2SoC. For
hi~er temperatUres, the current doubles every +IO"C.
152 LINEAR IC's
-~-----
--
-- ---~
l
I
J
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