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PDF 25Q32BV Data sheet ( Hoja de datos )

Número de pieza 25Q32BV
Descripción 3v 32M-Bit Serial Flash Memory
Fabricantes Winbond 
Logotipo Winbond Logotipo



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No Preview Available ! 25Q32BV Hoja de datos, Descripción, Manual

W25Q32BV
3V 32M-BIT
SERIAL FLASH MEMORY WITH
DUAL AND QUAD SPI
Publication Release Date: October 04,2013
- 1 - Revision I

1 page




25Q32BV pdf
W25Q32BV
1. GENERAL DESCRIPTION
The W25Q32BV (32M-bit) Serial Flash memory provides a storage solution for systems with limited
space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial
Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI
(XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with
current consumption as low as 4mA active and 1µA for power-down.
The W25Q32BV array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes
can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128
(32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32BV
has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater
flexibility in applications that require data and parameter storage. (See figure 2.)
The W25Q32BV supports the standard Serial Peripheral Interface (SPI), and a high performance
Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1
(DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 320MHz (80MHz x 4) for Quad I/O when
using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient
memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true
XIP (execute in place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control,
provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and
device identification with a 64-bit Unique Serial Number.
2. FEATURES
Family of SpiFlash Memories
W25Q32BV: 32M-bit / 4M-byte (4,194,304)
256-byte per programmable page
Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
Highest Performance Serial Flash
104MHz Dual SPI / 80MHz Quad SPI clocks
208/320MHz equivalent Dual/Quad SPI
40MB/S continuous data transfer rate
Up to 8X that of ordinary Serial Flash
More than 100,000 erase/program cycles(1)
More than 20-year data retention
Efficient “Continuous Read Mode”
Low Instruction overhead
Continuous Read with 8/16/32/64-Byte Wrap
As few as 8 clocks to address memory
Allows true XIP (execute in place) operation
Outperforms X16 Parallel Flash
Low Power, Wide Temperature Range
Single 2.7 to 3.6V supply
4mA active current, <1µA Power-down (typ.)
-40°C to +85°C operating range
Flexible Architecture with 4KB sectors
Uniform Sector/Block Erase (4/32/64K-bytes)
Program one to 256 bytes
Erase/Program Suspend & Resume
Advanced Security Features
Software and Hardware Write-Protect
Top/Bottom, 4KB complement array protection
Power Supply Lock-Down and OTP protection
64-Bit Unique ID for each device
Discoverable Parameters (SFDP) Register
3X256-Byte Security Registers with OTP locks
Volatile & Non-volatile Status Register Bits
Space Efficient Packaging(1)
8-pin SOIC/VSOP 208-mil
8-pad WSON 6x5-mm/8x6-mm
16-pin SOIC 300-mil
8-pin PDIP 300-mil
24-ball TFBGA 8x6-mm (6x4/5x5 ball array)
Contact Winbond for KGD and other options
Note 1. Some package types are special orders, please contact Winbond for ordering information.
Publication Release Date: October 04,2013
- 5 - Revision I

5 Page





25Q32BV arduino
W25Q32BV
5. BLOCK DIAGRAM
SFDP Register
000000h
0000FFh
Block Segmentation
xxFF00h
Sector 15 (4KB)
xxF000h
xxFFFFh
xxF0FFh
xxEF00h
Sector 14 (4KB)
xxE000h
xxEFFFh
xxE0FFh
xxDF00h
Sector 13 (4KB)
xxD000h
xxDFFFh
xxD0FFh
xx2F00h
xx2000h
xx1F00h
xx1000h
xx0F00h
xx0000h
Sector 2 (4KB)
Sector 1 (4KB)
Sector 0 (4KB)
xx2FFFh
xx20FFh
xx1FFFh
xx10FFh
xx0FFFh
xx00FFh
/WP (IO2)
Write Control
Logic
Status
Register
/HOLD (IO3)
CLK
/CS
DI (IO0)
DO (IO1)
SPI
Command &
Control Logic
High Voltage
Generators
Page Address
Latch / Counter
Data
Byte Address
Latch / Counter
Security Register 1 - 3
003000h
002000h
001000h
0030FFh
0020FFh
0010FFh
3FFF00h
3FFFFFh
Block 63 (64KB)
3F0000h
3F00FFh
20FF00h
20FFFFh
Block 32 (64KB)
200000h
2000FFh
1FFF00h
1F0000h
Block 31 (64KB)
1FFFFFh
1F00FFh
10FF00h
10FFFFh
Block 16 (64KB)
100000h
1000FFh
0FFF00h
0F0000h
Block 15 (64KB)
0FFFFFh
0F00FFh
00FF00h
000000h
Block 0 (64KB)
00FFFFh
0000FFh
Beginning
Page Address
Ending
Page Address
Column Decode
And 256-Byte Page Buffer
Figure 2. W25Q32BV Serial Flash Memory Block Diagram
- 11 -
Publication Release Date: October 04,2013
Revision I

11 Page







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