|
|
PDF ICS9LPRS502 Data sheet ( Hoja de datos )
| Número de pieza | ICS9LPRS502 | |
| Descripción | 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR | |
| Fabricantes | IDT | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ICS9LPRS502 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
|
No Preview Available !
Datasheet
56-PIN CK505 W/FULLY INTEGRATED VOLTAGE
REGULATOR + INTEGRATED SERIES RESISTOR
ICS9LPRS502
Recommended Application:
CK505 compliant clock with fully integrated voltage
regulator and Internal series resistor on differential outputs,
PCIe Gen 1 compliant
Output Features:
• 2 - CPU differential low power push-pull pairs
• 7 - SRC differential low power push-pull pairs
• 1 - CPU/SRC selectable differential low power push-pull
pair
• 1 - SRC/DOT selectable differential low power push-pull
pair
• 5 - PCI, 33MHz
• 1 - PCI_F, 33MHz free running
• 1 - USB, 48MHz
• 1 - REF, 14.318MHz
Key Specifications:
• CPU outputs cycle-cycle jitter < 85ps
• SRC output cycle-cycle jitter < 125ps
• PCI outputs cycle-cycle jitter < 250ps
• +/- 100ppm frequency accuracy on CPU & SRC
clocks
Features/Benefits:
• Does not require external pass transistor for voltage
regulator
• Integrated series resistors on differential outputs,
Zo=50W
• Supports spread spectrum modulation, default is 0.5%
down spread
• Uses external 14.318MHz crystal, external crystal
load caps are required for frequency tuning
• One differential push-pull pair selectable between
SRC and two single-ended outputs
Table 1: CPU Frequency Select Table
Pin Configuration
FSLC2 FSLB1 FSLA1
B0b7 B0b6 B0b5
CPU
MHz
SRC
MHz
PCI REF USB
MHz MHz MHz
0 0 0 266.66
0 0 1 133.33
0 1 0 200.00
0 1 1 166.66 100.00 33.33 14.318 48.00
1 0 0 333.33
1 0 1 100.00
1 1 0 400.00
111
Reserved
1. FSLA and FSLB are low-threshold inputs.Please see VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FSLC is a three-level input. Please see the VIL_FS and VIH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
DOT
MHz
96.00
PCICLK0/CR#_A 1
VDDPCI 2
PCICLK1/CR#_B 3
PCICLK2/LTE 4
PCICLK3 5
PCICLK4/SRC5_EN 6
PCI_F5/ITP_EN 7
GNDPCI 8
VDD48 9
USB_48MHz/FSLA 10
GND48 11
VDD96I/O 12
DOTT_96/SRCCLKT0 13
DOTC_96/SRCCLKC0 14
GND 15
VDD 16
SRCCLKT1/SE1 17
SRCCLKC1/SE2 18
GND 19
VDDPLL3I/O 20
SRCCLKT2/SATACLKT 21
SRCCLKC2/SATACLKC 22
GNDSRC 23
SRCCLKT3/CR#_C 24
SRCCLKC3/CR#_D 25
VDDSRCI/O 26
SRCCLKT4 27
SRCCLKC4 28
56 SCLK
55 SDATA
54 FSLC/TEST_SEL/REF0
53 VDDREF
52 X1
51 X2
50 GNDREF
49 FSLB/TEST_MODE
48 CK_PWRGD/PD#
47 VDDCPU
46 CPUCLKT0
45 CPUCLKC0
44 GNDCPU
43 CPUCLKT1
42 CPUCLKC1
41 VDDCPUI/O
40 NC
39 CPUCLKT2_ITP/SRCCLKT8
38 CPUCLKC2_ITP/SRCCLKC8
37 VDDSRCI/O
36 SRCCLKT7/CR#_F
35 SRCCLKC7/CR#_E
34 GNDSRC
33 SRCCLKT6
32 SRCCLKC6
31 VDDSRC
30 PCI_STOP#/SRCCLKT5
29 CPU_STOP#/SRCCLKC5
56-SSOP/TSSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
IDTTM/ICSTM 56-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
1125E—02/26/09
1
Free Datasheet http://www.Datasheet4U.com
1 page  
ICS9LPRS502
56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR
Advance Information
SSOP/TSSOP Pin Description (Continued)
PIN #
PIN NAME
48 CK_PWRGD/PD#
49 FSLB/TEST_MODE
50 GNDREF
51 X2
52 X1
53 VDDREF
54 REF0/FSLC/TEST_SEL
55 SDATA
56 SCLK
TYPE
IN
IN
PWR
OUT
IN
PWR
I/O
I/O
IN
DESCRIPTION
Notifies CK505 to sample latched inputs, or iAMT entry/exit, or PWRDWN# mode
3.3V tolerant input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS
and Vih_FS values. TEST_MODE is a real time input to select between Hi-Z and REF/N divider
mode while in test mode. Refer to Test Clarification Table.
Ground pin for crystal oscillator circuit
Crystal output, nominally 14.318MHz.
Crystal input, Nominally 14.318MHz.
Power pin for the REF outputs, 3.3V nominal.
3.3V 14.318MHz reference clock/3.3V tolerant low threshold input for CPU frequency selection.
Refer to input electrical characteristics for Vil_FS and Vih_FS values/ TEST_SEL: 3-level latched
input to enable test mode. Refer to Test Clarification Table.
Data pin for SMBus circuitry, 5V tolerant.
Clock pin of SMBus circuitry, 5V tolerant.
Fully Integrated Regulator Connection for Desktop/Mobile Applications
ICS9LPR502
ICS9LPRS502
VDDCPU_IO, Pin 41
NC
PIN 40
1.05V to 3.3V
(+/-5%)
CPU_IO Decoupling
Network
96_IO Decoupling
Network
PLL3_IO Decoupling
Network
SRC_IO Decoupling
Network
VDDSRC_IO Pin 37, 26
VDDPLL3_IO, Pin 20
VDD96_IO, Pin 12
IDTTM/ICSTM 56-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
5
1125E—02/26/09
Free Datasheet http://www.Datasheet4U.com
5 Page 
ICS9LPRS502
56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR
Advance Information
General Description
ICS9LPRS502 follows Intel CK505 Yellow Cover specification. This clock synthesizer provides a single chip solution for
next generation Intel processors and Intel chipsets. ICS9LPRS502 is driven with a 14.318MHz crystal. It also provides a
tight ppm accuracy output for Serial ATA and PCI-Express support.
Funtional Block Diagram
X1
X2 OSC
REF
REF
CPU(1:0)
CPU PLL1
SS
CPU
SRC
SRC _MA IN
SRC8/ITP
SRC(7:3)
PLL3
SS
SRC
PCI33MHz
FSLA
CKPWRGD/PD#
PCI_STOP#
CPU_STOP#
CR#_(A:F)
SRC5_EN
ITP_EN
FSLC/TESTSEL
FSLB/TESTMODE
Control
Logic
PLL2
Non-SS
SATA
DOT96MHz
48MHz
PCI33MHz
Differential Output
SE Outputs
7
PCI(5:0)
SRC2/SATA
SRC1/SE(2:1)
SRC0/DOT96
48MHz
Power Groups
Pin Number
VDD
GND
41 44
47 44
26, 37
23,34
31 23,34
20 19
16 19
12 11
9 11
53 50
28
Description
CPUCLK
Low power outputs
Master Clock, Analog
SRCCLK
Low power outputs
PLL 1
PLL3/SE
Low power outputs
PLL 3
DOT 96Mhz Low power outputs
USB 48
Xtal, REF
PCICLK
IDTTM/ICSTM 56-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
11
1125E—02/26/09
Free Datasheet http://www.Datasheet4U.com
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet ICS9LPRS502.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ICS9LPRS501 | 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR | IDT |
| ICS9LPRS502 | 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR | IDT |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |