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PDF HI3515 Datasheet ( Hoja de datos )

Número de pieza HI3515
Descripción H.264 Encoding and Decoding Processor
Fabricantes Hisilicon 
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HI3515 Hoja de datos, Descripción, Manual
Hi3515 H.264 Encoding and Decoding Processor
Data Sheet
Issue
Date
02
2010-04-20
Free Datasheet http://www.Datasheet4U.com

1 page

HI3515 pdf
Hi3515
Data Sheet
Symbol Description
RC
The register is cleared on a
read.
About This Document
Symbol Description
The register can be read.
The register is cleared when 1
WC is written.
The register keeps unchanged
when 0 is written.
Numerical System
The expressions of data capacity, frequency, and data rate are described as follows.
Type
Symbol
Value
Data capacity (such as the
RAM capacity)
1K
1M
1G
1024
1,048,576
1,073,741,824
1k 1000
Frequency, data rate
1M
1,000,000
1G 1,000,000,000
The expressions of addresses and data are described as follows.
Symbol
Example
Description
0x
0xFE04, 0x18
Address or data in hexadecimal
0b 0b000, 0b00 00000000 Data or sequence in binary (register
description is excluded.)
X
00X1XX
In data expression, X indicates 0 or 1.
For example, 00X indicates 000 or 001
and 1XX indicates 100, 101, 110, or
111.
Update History
Updates between document issues are cumulative. Therefore, the latest document issue
contains all updates made in previous issues.
Updates in Issue 02 (2010-04-20)
Chapter 1 Product Description
Issue 02 (2010-04-20)
HiSilicon Proprietary and Confidential
Copyright © HiSilicon Technologies CO., LIMITED
3
Free Datasheet http://www.Datasheet4U.com

5 Page

HI3515 arduino
1 Product Description
Hi3515
Data Sheet
1.1.2 Processor System
The Hi3515 processor is built based on the high-performance ARM926 processor. With the
maximum processing frequency of 400 MHz, the ARM926 CPU provides flexible and various
application services and high-performance audio/video services. The processor system
consists of the following parts:
z ARM926 processor: It serves as the main control CPU to work with the hardware
accelerator to encode and decode audio/video streams and schedule the system. This
processor is embedded with 16 KB instruction cache, 16 KB data cache, and 2 KB
instruction tightly-coupled memory (ITCM) and its operating frequency is up to 400
MHz.
z Direct memory access controller (DMAC): The DMAC can directly transfer data
between a memory and a peripheral, between peripherals, and between memories.
z Interrupt system: It provides interrupt management to the entire system and supports 32
interrupt sources.
z Clock: It manages the clocks in the entire system, including the main clock of the chip
and the gating clock of each module.
z Reset module: It manages the resets of the entire system and each functional module in a
unified manner. To be specific, it manages and controls the power-on reset, soft reset of
the system, and separate soft reset for each functional module.
z Timer: It provides two groups of dual-timers. Each group provides two independent
timers.
z Watchdog: It resets the entire system when an exception occurs in the system.
z Real-time clock (RTC): It displays the time and reports alarms periodically.
z System controller: It controls the running mode of the system, monitors the running
status of the system, manages key modules (such as the clock, reset module, and pin
multiplexing) in the system, and configures certain functions of the peripherals.
1.1.3 Graphics Processing
The Hi3515 graphics processing module processes the video input (VI)/video output (VO)
images for better display effect and strong adaptability to various scenarios. The features of
the graphics processing module are as follows:
z Supports the de-interlace processing of input images
z Supports the de-interlace processing of output images for progressive display and the
conversion from 60 fields to 60 frames or from 60 fields to 30 frames
z Supports color and contrast enhancement and image denoising
z Supports clip, alpha blending, raster operation (ROP), colorkey, and gamma correction
z Supports up to x16 image scaling
z Supports on-screen display (OSD) blending and video overlapping of four areas
z Supports the anti-flicker operation on output images
z Supports 2D data copying and data stuffing
1-2
HiSilicon Proprietary and Confidential
Copyright © HiSilicon Technologies CO., LIMITED
Issue 02 (2010-04-20)
Free Datasheet http://www.Datasheet4U.com

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