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PDF K7A50D Data sheet ( Hoja de datos )

Número de pieza K7A50D
Descripción TK7A50D
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! K7A50D Hoja de datos, Descripción, Manual

TK7A50D
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOS)
TK7A50D
Switching Regulator Applications
Low drain-source ON-resistance: RDS (ON) = 1.0 Ω (typ.)
High forward transfer admittance: Yfs= 2.5 S (typ.)
Low leakage current: IDSS = 10 μA (max) (VDS = 500 V)
Enhancement mode: Vth = 2.4 to 4.4 V (VDS = 10 V, ID = 1 mA)
Unit: mm
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
DC (Note 1)
Pulse (t = 1 ms)
(Note 1)
Drain power dissipation (Tc = 25°C)
Single pulse avalanche energy
(Note 2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
Symbol
VDSS
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
500
±30
7
28
35
129
7
3.5
150
55 to 150
Unit
V
V
A
W
mJ
A
mJ
°C
°C
1: Gate
2: Drain
3: Source
JEDEC
JEITA
SC-67
TOSHIBA
2-10U1B
Weight: 1.7 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and Methods’’) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Internal Connection
Characteristics
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Symbol
Rth (ch-c)
Rth (ch-a)
Max
3.57
62.5
Unit
°C/W
°C/W
2
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 4.5 mH, RG = 25 Ω, IAR = 7 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
1
3
1 2010-06-03
Free Datasheet http://www.nDatasheet.com

1 page




K7A50D pdf
TK7A50D
10
1 Duty=0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
10μ
100μ
rth – tw
SINGLE PULSE
PDM
t
T
Duty = t/T
Rth (ch-c) = 3.57 °C/W
1m
10m
100m
1
10
PULSE WIDTH tw (s)
SAFE OPERATING AREA
100
ID max (pulsed) *
10 ID max (continuous)
100 μs *
1 ms *
1
DC operation
Tc = 25°C
0.1
0.01
*: SINGLE NONREPETITIVE
PULSE Tc = 25°C
CURVES MUST BE DERATED
LINEARLY WITH INCREASE IN
TEMPERATURE.
0.001
1
10
VDSS max
100
1000
DRAIN-SOURCE VOLTAGE VDS (V)
EAS – Tch
200
160
120
80
40
0
25 50 75 100 125 150
CHANNEL TEMPEATURE (INITIAL)
Tch(°C)
15 V
15 V
BVDSS
IAR
VDD
VDS
TEST CIRCUIT
WAVEFORM
RG = 25 Ω
VDD = 90 V, L = 4.5 mH
ΕAS
=
1
2
L I2
⎜⎛
⎜⎝
BVDSS
BVDSS VDD
⎟⎞
⎟⎠
5 2010-06-03
Free Datasheet http://www.nDatasheet.com

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