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PDF EL2019 Data sheet ( Hoja de datos )

Número de pieza EL2019
Descripción High Voltage Comparator
Fabricantes Intersil 
Logotipo Intersil Logotipo



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No Preview Available ! EL2019 Hoja de datos, Descripción, Manual

® cN1o-On8t8Ra8cED-tIOCNaoOBTutESMarROTMSSeLEcIEhLNhTeDnoEeiErcPtDwaRlwRSOwEuD.PpiUnpLCtAoeTrrCtsEiClM.ecEnotNmeTr/tDastcecember 1995, Rev. G
EL2019
FN7025
Fast, High Voltage Comparator with
Master Slave Flip-Flop
The EL2019 offers a new feature
previously unavailable in a comparator
before—a master/slave edge triggered
flip-flop. The comparator output will only change output state
after a positive going clock edge is applied. Thus the output
can't feed back to the input and cause oscillation.
Manufactured with Elantec's proprietary Complementary
Bipolar process, this device uses fast PNP and NPN
transistors in the signal path. A unique circuit design gives
the inputs the ability to handle large common mode and
differential mode signals, yet retain high speed and excellent
accuracy. Careful design of the front end insures speed and
accuracy when operating with a mix of small and large
signals. The three-state output stage is designed to be TTL
compatible for any power supply combination, yet it draws a
constant current and does not generate current glitches.
When the output is disabled, the supply current consumption
drops by 50%, but the input stage and master slave flip-flop
remain active.
Ordering Information
PART NUMBER TEMP. RANGE
EL2019CN
-40°C to +85°C
PACKAGE
8-Pin PDIP
PKG. NO.
MDP0006
Pinout
EL2019
(8-PIN PDIP)
TOP VIEW
Features
• Comparator cannot oscillate
• Fast response—5ns data to clock setup, 20ns clock to
output
• Wide input differential voltage range—24V on ±15V
supplies
• Wide input common mode voltage range—±12V
• Precision input stage—VOS = 1.5mV
• Low input bias current—100nA
• Low input offset current—30nA
• ±4.5V to ±18V supplies
• Three-State TTL compatible output
• No supply current glitch during switching
• 103dB voltage gain (Low input uncertainty 30µV)
• 50% power reduction in shut-down mode
• Input and flip-flop remain active in shutdown mode
Applications
• Analog to digital converters
• ATE pin receiver
• Zero crossing detector
• Window detector
• “Go/no-go” detector
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
Free Datasheet http://www.datasheetlist.com/

1 page




EL2019 pdf
EL2019
Typical AC Performance Curves (Continued)
Input Bias Current vs
Differential Input Voltage
Input Bias Current
vs Temperature
Input Bias Current vs
Common Mode Voltage
VO/VI Transfer Characteristics
Supply Current
vs Supply Voltage
Supply Current
vs Temperature
5
Free Datasheet http://www.datasheetlist.com/

5 Page





EL2019 arduino
EL2019 Macromodel
* Connections: +input
* | -input
* | | +V
* | | | -V
* | | | | Cpin
* | | | | | CS
* | | | | | | output
* | ||||||
.subckt M2019 2 3 8 4 6 5 7
*
* Input Stage
*
i1 8 10 700µA
r1 13 4 1K
r2 14 4 1K
q1 8 3 11 qn
q2 8 2 12 qn
q3 13 11 10 qp
q4 14 12 10 qp
i2 11 4 200µA
i3 12 4 200µA
*
* 2nd Stage & Flip Flop
*
*i4 8 24 700µA
i4 8 24 1mA
q9 22 6 24 qp
q10 18 17 24 qp
v1 17 0 2.5V
q5 15 14 22 qp
q6 16 13 22 qp
r3 15 4 1K
r4 16 4 1K
q7 16 15 18 qp
q8 15 16 18 qp
i5 8 40 500µA
q11 41 17 40 qp
q12 42 6 40 qp
q13 43 16 41 qp
q14 44 15 41 qp
q15 44 43 42 qp
q16 43 44 42 qp
r5 43 4 1K
r6 44 4 1K
*
* Output Stage
*
i7 8 35 2mA
s1 35 20 5 0 sw
d2 35 8 ds
i6 26 34 5mA
s2 34 4 5 0 sw
d3 34 26 ds
q19 8 20 21 qn 2
q20 4 19 7 qp 2
r8 21 7 60
r7 20 19 4K
q17 19 44 26 qn 5
q18 0 43 26 qn 5
EL2019
11
Free Datasheet http://www.datasheetlist.com/

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