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PDF FP6326A Data sheet ( Hoja de datos )
| Número de pieza | FP6326A | |
| Descripción | Synchronous Buck PWM | |
| Fabricantes | Fiti | |
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fitipower integrated technology lnc.
FP6326/A
Synchronous Buck PWM
DC-DC Controller
Description
The FP6326/A is designed to drive two N-channel
MOSFETs in a synchronous rectified buck topology.
It provides the output adjustment, internal soft-start,
frequency compensation networks, monitoring and
protection functions into a single package.
The IC operating at fixed 300kHz or 600kHz
frequency provides simple, single feedback loop,
voltage mode control with fast transient response.
The resulting PWM duty ratio ranges from 0-100%.
The FP6326/A features over current protection. The
output current is monitored by sensing the voltage
drop across the RDS-ON of the low side MOSFET
which eliminates the need for a current sensing
resistor.
This device is available in SOP-8 package.
Features
● Operates from +5V or +12V
● High Output Current
● Drives Two Low Cost N-Channel MOSFETs
● Fast Transient Response
● Simple Single-Loop Control Design
( Voltage-Mode PWM Control)
● Internal Soft-Start
● Over-Current Fault Monitor
● Over-Voltage Protection
● Under-Voltage Protection
● SOP-8 Package
● RoHS Compliant
Applications
● Motherboard
● Graphic Card
● Telecomm Equipments
● High Power DC-DC Regulators
● Servers
Pin Assignment
SO Package (SOP-8)
Figure 1. Pin Assignment of FP6326/A
Ordering Information
FP6326□□□□
TR: Tape / Reel
G: Green
Package Type
SO: SOP-8
Switching Frequency
Blank: 300kHz
A: 600kHz
FP6326/A-1.1-JUL-2009
1
Free Datasheet http://www.datasheet4u.net/
1 page  
fitipower integrated technology lnc.
FP6326/A
Electrical Characteristics
(VCC=12V, TA=25°C, unless otherwise specified)
Parameter
Symbol Conditions
INPUT
VCC Under Voltage Lockout
UVLO Hysteresis
VUVLO
Quiescent Current
ICC
ERROR AMPLIFIER
Feedback Voltage
FB Input Bias Current
Open Loop DC Gain
(Note2)
OSCILLATOR
VFB
IFB
AO
Frequency
Frequency
Ramp Amplitude
FOSC
FOSC
△VOSC
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
Dead Time (Note2)
IUGATE
RUGATE
ILGATE
RLGATE
TDT
PROTECTION
FB Under-Voltage Trip
FB Over-Voltage Trip
OCSET Current Source
Soft-Start Interval (Note2)
IOCSET
Tss
Note2: Guarantee by design.
VCC rising
VCC falling
UGATE and LGATE open
VFB=1V
VCC=12V FP6326
VCC=12V FP6326A
VCC=12V
VBOOT-VPHASE=12V, VUGATE-VPHASE=6V
VBOOT-VPHASE=12V, VUGATE-VPHASE=1V
VCC=12V, VLGATE =6V
VCC=12V, VLGATE =1V
FB Falling
VPHASE=0V
Min
3.7
0.784
250
500
0.6
0.6
70
35
2
Typ Max
4.1 4.5
0.45
6 15
0.8 0.816
0.1
85
300 350
600 700
1.5
1
25
1
25
100
75 80
120
40 45
3.5
Unit
V
V
mA
V
µA
dB
kHz
kHz
Vp-p
A
Ω
A
Ω
ns
%
%
µA
ms
FP6326/A-1.1-JUL-2009
5
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5 Page 
fitipower integrated technology lnc.
FP6326/A
Application Information
Introduction
The FP6326/A integrated circuit is a synchronous
PWM controller, it operates over a wide input voltage
range. Being low cost, it is a very popular choice of
PWM controller. This section will describe the
FP6326/A application suggestion. The operation and
the design of this application will also be discussed
in detail.
Design Procedures
This section will describe the steps to design
synchronous buck system, and explains how to
construct basic power conversion circuits including
the design of the control chip functions and the basic
loop.
(1) Synchronous Buck Converter
Since this is a buck output system, the first quantity
to be determined is the duty cycle value. The
formula calculated the PWM duty ratio, apply to the
system which we propose to design:
(2) Inductor Selection
To find the inductor value it is necessary to consider
the inductor ripple current. Choose an inductor
which operated in continuous mode down to 10
percent of the rated output load:
ΔIL = 2 x 10% x IO
The inductor “L” value for this system is connected
to be:
L≧
(VIN - VDS(sat) – VO) x DMIN
ΔIL x fS
If the core loss is a problem, increasing the
inductance of L will be helpful.
(3) Output Capacitor Selection
a. The output capacitor is required to filter the output
noise and provide regulator loop stability. When
selecting an output capacitor, the important
capacitor parameters are; the 100kHz Equivalent
Series Resistance (ESR), the RMS ripples
current rating, the voltage rating, and capacitance
value. For the output capacitor, the ESR value is
the most important parameter.
FP6326/A-1.1-JUL-2009
The ESR can be calculated from the following
formula.
ESR
=
⎜⎛
⎝
VRIPPLE
ΔIL
⎟⎞
⎠
An aluminum electrolytic capacitor's ESR value
is related to the capacitance and its voltage
rating. In most case, higher voltage electrolytic
capacitors have lower ESR values. Most of the
time, capacitors with much higher voltage ratings
may be needed to provide the low ESR values
required for low output ripple voltage.
b. The capacitor voltage rating should be at least
1.5 times greater than the output voltage, and
often much higher voltage ratings are needed to
satisfy the low ESR requirements needed for low
output ripple voltage.
(3) Output N-channel MOSFET Selection
a. The current ability of the output N-channel
MOSFETs must be at least more than the peak
switching current IPK. The voltage rating VDS of
the N-channel MOSFETs should be at least 1.25
times the maximum input voltage. Choose the
low RDS-ON MOSFETs for reducing the
conduction power loss. Choose the low CISS
MOSFETs for reducing the switching loss. But
most of time, the two factors are trade-off.
Consider the system requirement and define the
MOSFETs rating.
b. The MOSFETs must be fast (switch time) and
must be located close to the FP6326/A using
short leads and short printed circuit traces. In
case of a large output current, we must layout a
copper to reduce the temperature of these two
MOSFETs.
(4) Input Capacitor Selection
a. The RMS current rating of the input capacitor can
be calculated from the next page formula table.
b. This capacitor should be located close to the IC
using short leads and the volt age rating should
be approximately 1.5 times the maximum input
voltage.
11
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