PDF TDA18211HD Data sheet ( Hoja de datos )

Número de pieza	TDA18211HD
Descripción	DVB-T Silicon Tuner IC
Fabricantes	NXP Semiconductors
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No Preview Available ! TDA18211HD DVB-T Silicon Tuner IC Rev. 05 — 2 June 2009 Product data sheet 1. General description The TDA18211HD is a Silicon Tuner IC designed for digital terrestrial (DVB-T) TV reception. The TDA18211HD integrates the overall tuning function, including selectivity, and provides a low-IF output signal. The TDA18211HD uses integrated IF ﬁlters to support 6/7/8 MHz channel bandwidths. The TDA18211HD requires only one single 16 MHz crystal for clock generation. A clock signal is available on crystal oscillator output pins (XTOUTP/XTOUTN) to synchronize the channel decoder and slave front end in case of DVR conﬁguration. This speciﬁcation is based on software version 3.4 2. Features I Fully integrated RF tracking ﬁlters for unwanted signal suppression I Fully integrated IF selectivity (no need for external SAW ﬁlters) I Fully integrated oscillators with no external components I Integrated wideband gain control I Alignment free I RF loop-through for easy implementation in the STB I Input power level indicator I Integrated die thermal sensor I Single 3.3 V power supply I Low power consumption (780 mW) I Crystal oscillator output buffer (16 MHz) to allow single crystal applications I I2C-bus interface compatible with 3.3 V and 5 V microcontrollers I Three Standby modes I RoHS packaging 3. Applications 3.1 Target applications I DVB-T Set-Top-Box (STB) and TV receiver I Application optimization is described in the application notes Free Datasheet http://www.datasheet4u.com/ 1 page NXP Semiconductors TDA18211HD DVB-T Silicon Tuner IC TDA18211HD_5 Product data sheet Table 3. Pin description …continued Symbol Pin Description GND 14 ground STO 15 slave tuner output VCC 16 3.3 V supply voltage CAPREGVCO 17 VCO supply decoupling VCC 18 3.3 V supply voltage MASTERSYNC 19 synchronization signal for dual-tuner applications; leave open for single-tuner applications CAPFILTVCO 20 VCO reference decoupling VT_COARSE 21 LO oscillator tuning voltage input VT_FINE 22 LO oscillator tuning voltage input GND 23 ground CP_LO 24 charge pump of the local synthesizer GND 25 ground XTALP 26 crystal oscillator input XTALN 27 crystal oscillator input FREEZE 28 synchronization signal for multi-tuner applications; leave open for single-tuner applications XTOUT_MS 29 XTOUT mode and master/slave selection input XTOUTP 30 crystal oscillator output buffer XTOUTN 31 crystal oscillator output buffer AS 32 I2C-bus address selection input VCC 33 3.3 V supply voltage CP_CAL 34 charge pump of the calibration synthesizer VT_CAL 35 tuning voltage of the calibration synthesizer GND 36, 37 ground SCL 38 I2C-bus clock input SDA 39 I2C-bus data input/output CAPREG18 40 internal regulator decoupling GND 41 ground CAPREG28 42 internal regulator decoupling GND 43 ground VCC 44 3.3 V supply voltage IFOUTN 45 IF output IFOUTP 46 IF output V_IFAGC 47 IF gain control input GND 48 to 50 ground VSYNC 51 vertical synchronization input for analog applications; connect to ground for digital applications CAPREGFILTRF 52 internal regulator decoupling GND 53 to 64 ground - exposed ground die Rev. 05 — 2 June 2009 © NXP B.V. 2009. All rights reserved. 5 of 66 Free Datasheet http://www.datasheet4u.com/ 5 Page NXP Semiconductors TDA18211HD DVB-T Silicon Tuner IC Table 6. I2C-bus at power-on reset[1] …continued Name Byte Subaddress 7 Extended byte 21 EB21 24h 0 Extended byte 22 EB22 25h 0 Extended byte 23 EB23 26h 1 [1] X indicates a bit not changed on reset. Bit 654 3 011 0 100 1 011 0 2 10 0 11 0 00 0 00 9.3 Description of symbols used in I2C-bus format table Table 7. I2C-bus registers bits explanation Address Byte Symbol Description MA[1:0] programmable address bits AD[5:0] programmable address bits of the ﬁrst byte of the programming Data bytes 00h ID ID[6:0] chip identiﬁcation number 01h TM POR Power-on reset bit LOCK indicates that the main synthesizer is locked to the programmed frequency TM_RANGE range selection bit for the internal die sensor TM_ON enables die temperature measurement TM_D[3:0] data from die temperature measurement (read only) 02h PL POWER_LEVEL[7:0] Power level indicator value (read only) 03h EP1 POWER_LEVEL[8] Power level indicator value (read only DIS_POWER_LEVEL disables the power-on level function RF_CAL_OK indicates that the RF tracking ﬁlter calibration procedure has been successful IR_CAL_OK indicates that the complete image rejection calibration procedure has been successful BP_FILTER[2:0] RF band-pass ﬁlter selection 04h EP2 RF_BAND[2:0] RF tracking ﬁlter band selection GAIN_TAPER[4:0] gain taper value 05h EP3 SM Sleep mode, Standby modes SM_LT SM_XT STD[4:0] deﬁne the standard 06h EP4 FM_RFN selection which input is fed to RF ﬁlter XTOUT_ON provides the 16 MHz on the XTOUTP and XTOUTN pins IF_LEVEL[2:0] IF output level selection CAL_MODE[1:0] calibration mode selection 07h EP5 EXTENDED_REG enables the extended register addressing IR_GSTEP[2:0] gain step for image rejection calibration IR_MEAS[2:0] image rejection measurement frequency range 08h CPD CAL_POST_DIV[7:0] calibration synthesizer post-divider Reference Table 8 Table 9 Table 10 Table 11 Table 12 Table 12 Table 13 Table 14 Table 15 Table 17 Table 18 Table 19 TDA18211HD_5 Product data sheet Rev. 05 — 2 June 2009 © NXP B.V. 2009. All rights reserved. 11 of 66 Free Datasheet http://www.datasheet4u.com/ 11 Page

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